ADT7466
Rev. 2 | Page 34 of 48 | www.onsemi.com
ADT7466 REGISTER MAP
Table 30. ADT7466 Registers
Addr. R/W Name Description Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default
Lock-
able
0x00 R/W CONF1 Configuration 1 OBIN Vcc TODIS FSPDIS FSPD RDY LOCK STRT 0x01 Yes
0x01 R/W CONF2 Configuration 2 REM2 SHDN RATE AVG REFZ CURR RTYPE 0x00 Yes
0x02 R/W CONF3 Configuration 3 THER 2 THER1 DC2 DC1 FAST BOOST P7C1 P7C0 0xC0 Yes
0x03 R/W CONF4 Configuration 4 MIN2 MIN1 SNGL CH2 CH1 CH0 0x00 Yes
0x04 R/W CONF5 Reserved 0x00 Yes
0x05 R/W AFC1 AFC1 Configuration MAX STRT MIN MAN LOC REM TH2 TH1 0x0C Yes
0x06 R/W AFC2 AFC2 Configuration MAX STRT MIN MAN LOC REM TH2 TH1 0x0C Yes
0x07 Reserved 7 6 5 4 3 2 1 0 0x00 Yes
0x08 R EXT1 Extended Resolution 1 AIN1-1 AIN1-0 AIN2-1 AIN2-0 VCC1 VCC0 REM1 REM0 0x00
0x09 R EXT2 Extended Resolution 2 LOC1 LOC0 0x00
0x0A R AIN1
AIN1(TH1)/REM2
Reading 9 8 7 6 5 4 3 2 0x00
0x0B R AIN2 AIN2(TH2) Reading 9 8 7 6 5 4 3 2 0x00
0x0C R V
CC
V
cc
Reading 9 8 7 6 5 4 3 2 0x00
0x0D R REM1 Remote1 Temp Reading 9 8 7 6 5 4 3 2 0x00
0x0E R LOC Local Temp Reading 9 8 7 6 5 4 3 2 0x00
0x0F R PCHT
PROCHOT
Reading
TMR TMR TMR TMR TMR TMR TMR
ASRT/
TMR0 0x00
0x10 R INT1 Interrupt Status 1 OOL
AIN1(TH1)/
REM2 AIN2(TH2) V
cc
REM1 LOC FAN1 FAN2 0x00
0x11 R INT2 Interrupt Status 2 TH2 TH1 D2 D1 PHOT OVT 0x00
0x12 R/W MASK1 Interrupt Mask 1 OOL
AIN1(TH1)/
REM2
AIN2(TH2) V
cc
REM LOC FAN1 FAN2 0x00
0x13 R/W MASK2 Interrupt Mask 2 TH2 TH1 D2 D1 PHOT OVT 0x00
0x14 R/W AIN1LOW
AIN1(TH1)/REM2 Low
Limit
7 6 5 4 3 2 1 0 0x00
0x15 R/W AIN1HIGH
AIN1(TH1)/REM2 High
Limit
7 6 5 4 3 2 1 0 0xFF
0x16 R/W AIN2LOW AIN2(TH2) Low Limit 7 6 5 4 3 2 1 0 0x00
0x17 R/W AIN2HIGH AIN2(TH2) High Limit 7 6 5 4 3 2 1 0 0xFF
0x18 R/W VCCLOW V
cc
Low Limit 7 6 5 4 3 2 1 0 0x00
0x19 R/W VCCHIGH V
cc
High Limit 7 6 5 4 3 2 1 0 0xFF
0x1A R/W REM1LOW
Remote1 Temp Low
Limit
7 6 5 4 3 2 1 0 0x00
0x1B R/W REM1HIGH
Remote1 Temp High
Limit
7 6 5 4 3 2 1 0 0x7F
0x1C R/W LOCLOW Local Temp Low Limit 7 6 5 4 3 2 1 0 0x00
0x1D R/W LOCHIGH Local Temp High Limit 7 6 5 4 3 2 1 0 0x7F
0x1E R/W PCHTLIM
PROCHOT
Limit
LIMT LIMT LIMT LIMT LIMT LIMT LIMT LIMT 0x00 Yes
0x1F R/W AIN1THERM
AIN1(TH1)/REM2 Therm
Limit
7 6 5 4 3 2 1 0 0x64 Yes
0x20 R/W AIN2THERM AIN2(TH2) Therm Limit 7 6 5 4 3 2 1 0 0x64 Yes
0x21 R/W REM1THERM Remote 1 Therm Limit 7 6 5 4 3 2 1 0 0x64 Yes
0x22 R/W LOCTHERM Local Therm Limit 7 6 5 4 3 2 1 0 0x64 Yes
0x23 R/W Reserved 7 6 5 4 3 2 1 0 0x00 Yes
0x24 R/W AIN1OFS AIN1(TH1)/REM2 Offset 7 6 5 4 3 2 1 0 0x00 Yes
0x25 R/W AIN2OFS AIN2(TH2) Offset 7 6 5 4 3 2 1 0 0x00 Yes
0x26 R/W REM1OFS Remote1 Temp Offset 7 6 5 4 3 2 1 0 0x00 Yes
0x27 R/W LOCOFS Local Temp Offset 7 6 5 4 3 2 1 0 0x00 Yes
0x28 R/W AIN1TMIN AIN1(TH1)/REM2 TMIN 7 6 5 4 3 2 1 0 0x5A Yes
0x29 R/W AIN2TMIN AIN2(TH2) TMIN 7 6 5 4 3 2 1 0 0x5A Yes
0x2A R/W REM1TMIN Remote1 TMIN 7 6 5 4 3 2 1 0 0x5A Yes
0x2B R/W LOCTMIN Local TMIN 7 6 5 4 3 2 1 0 0x5A Yes
0x2C R/W THTRANGE
TH1(REM2)/TH2
TH1R3 TH1R2 TH1R1 TH1R0 TH2R3 TH2R2 TH2R1 TH2R0 0xCC Yes
ADT7466
Rev. 2 | Page 35 of 48 | www.onsemi.com
Addr. R/W Name Description Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Default
Lock-
able
TRANGE
0x2D R/W R1LTRANGE REM1,LOC TRANGE RM1R3 RM1R2 RM1R1 RM1R0 LOR3 LOR2 LOR1 LOR0 0xCC Yes
0x2E R/W THTHYS TH1,TH2 THyst TH1TH3 TH1TH2 TH1TH1 TH1TH0 TH2TH3 TH2TH2 TH2TH1 TH2TH0 0x44 Yes
0x2F R/W R1LTHYS Rem1/ Local THyst RM1H3 RM1H2 RM1H1 RM1H0 LOH3 LOH2 LOH1 LOH0 0x44 Yes
0x30 R/W FAN1START Fan1 Start-up Voltage 7 6 5 4 3 2 1 0 0x80 Yes
0x31 R/W FAN2START Fan2 Start-up Voltage 7 6 5 4 3 2 1 0 0x80 Yes
0x32 R/W FAN1MIN Fan1 Min Voltage 7 6 5 4 3 2 1 0 0x60 Yes
0x33 R/W FAN2MIN Fan2 Min Voltage 7 6 5 4 3 2 1 0 0x60 Yes
0x34 R/W FAN1MAX
Fan1 Max RPM (High
Byte) 7 6 5 4 3 2 1 0 0x20 Yes
0x35 R/W FAN2MAX
Fan2 Max RPM (High
Byte)
7 6 5 4 3 2 1 0 0x20 Yes
0x36 R/W ENHANCED Enhanced Acoustics FAN2EN FAN1EN FAN2-2 FAN2-1 FAN2-0 FAN1-2 FAN1-1 FAN1-0 0x3F Yes
0x37 R/W FAULTINC Fault Increment 7 6 FAN2-2 FAN2-1 FAN2-0 FAN1-2 FAN1-1 FAN1-0 0x3F Yes
0x38 R/W TIMEOUT
Startup Timeout
Configuration
ST2-2 ST2-1 ST2-0 ST1-2 ST1-1 ST1-0 0x00 Yes
0x39 R/W PULSES
Fan Pulses per
Revolution
FAN2 FAN2 FAN1 FAN1 0x05
0x3A R/W Reserved 7 6 5 4 3 2 1 0 0x00 Yes
0x3B R/W Not Used
0x3C R/W Not Used
0x3D R/W ID Device ID Register 7 6 5 4 3 2 1 0 0x66
0x3E R COMPANY Company ID Number 7 6 5 4 3 2 1 0 0x41
0x3F R REV Revision Number VER VER VER VER VER VER VER VER 0x02
0x40 R/W DRIVE 1 Drive 1 7 6 5 4 3 2 1 0 0x00
0x41 R/W DRIVE 2 Drive 2 7 6 5 4 3 2 1 0 0x00
0x42 R/W XOR XOR Tree Test Enable XEN 0x00 Yes
0x43 R/W Reserved 7 6 5 4 3 2 1 0 0x00 Yes
0x44 R/W
Reserved (Target
Monitor1) 7 6 5 4 3 2 1 0 0x00
0x45 R/W
Reserved (Target
Monitor2) 7 6 5 4 3 2 1 0 0x00
0x46 R/W Not Used
0x47 R/W Not Used
0x48 R TACH1L Tach1 Low Byte 7 6 5 4 3 2 1 0 0xFF
0x49 R TACH1H Tach1 High Byte 15 14 13 12 11 10 9 8 0xFF
0x4A R TACH2L Tach2 Low Byte 7 6 5 4 3 2 1 0 0xFF
0x4B R TACH2H Tach2 High Byte 15 14 13 12 11 10 9 8 0xFF
0x4C R/W TACH1LOW
Tach1 Minimum Low
Byte 7 6 5 4 3 2 1 0 0xFF
0x4D R/W TACH1HIGH
Tach1 Minimum High
Byte 7 6 5 4 3 2 1 0 0xFF
0x4E R/W TACH2LOW
Tach2 Minimum Low
Byte 7 6 5 4 3 2 1 0 0xFF
0x4F R/W TACH2HIGH
Tach2 Minimum High
Byte 7 6 5 4 3 2 1 0 0xFF
0x50 R/W TEST1 Test Register1 7 6 5 4 3 2 1 0 0x00 Yes
0x51 R/W TEST2 Test Register2 7 6 5 4 3 2 1 0 0x00 Yes
0x52 R/W TEST3 Test Register3 7 6 5 4 3 2 1 0 0x00 Yes
0x53 R/W TEST4 Test Register4 7 6 5 4 3 2 1 0 0x00 Yes
ADT7466
Rev. 2 | Page 36 of 48 | www.onsemi.com
REGISTER DETAILS
Configuration 1
Table 31. Register 0x00—Configuration Register 1 (Power-On Default = 0x01)
Bit No. Name Read/Write Description
0 STRT Read/Write Logic 1 enables monitoring, and PWM control outputs based on the limit settings programmed.
Logic 0 disables monitoring and PWM control based on the default power-up limit settings. The limit
values programmed are preserved even if a Logic 0 is written to this bit and the default settings are
enabled. This bit becomes read only and cannot be changed once Bit 1 (LOCK bit) is written. All limit
registers should be programmed by BIOS before setting this bit to 1. Lockable.
1 LOCK Write Once Logic 1 locks all limit values to their current settings. Once this bit is set, all lockable registers become
read only and cannot be modified until the ADT7466 is powered down and powered up again. This
prevents rogue programs such as viruses from modifying critical system limit settings. Lockable.
2 RDY Read Only This bit is set to 1 by the ADT7466 to indicate that the device is fully powered up and ready to begin
systems monitoring.
3 FSPD Read/Write When this bit is 1, it runs all fans at full speed. Power-on default is 0. This bit is not locked at any time.
4 FSPDIS Read/Write Logic 1 disables fan spin-up for two tach pulses. Instead, the DAC outputs go high for the entire fan
spin-up timeout selected.
5 TODIS Read/Write When this bit is 1, the SMBus timeout feature is disabled. This allows the ADT7466 to be used with
SMBus controllers that cannot handle SMBus timeouts. Lockable.
6 V
CC
Read/Write When this bit is 1, the ADT7466 rescales its V
CC
pin to measure a 5 V supply.
When this bit is 0, the ADT7466 measures V
CC
as a 3.3 V supply. Lockable.
7 OBIN Read/Write When this bit is 0 (default) temperature data format is binary.
When this bit is 1, format is offset binary.
Configuration 2
This register becomes read only when the Configuration Register 1 lock bit is set to 1. Additional attempts to write to this register have no
effect.
Table 32. Register 0x01—Configuration Register 2 (Power-On Default = 0x00)
Bit No. Name Read/Write Description
0 RTYPE Read/Write When this bit is cleared (default), thermistor normalization is optimized for 100 kΩ thermistors. When
this bit is set, it is optimized for 10 kΩ thermistors.
1 CURR Read/Write This bit sets the thermal diode current. It should be left at 0.
2 REFZ Read/Write Setting this bit makes the REFOUT pin high impedance.
3 Unused Unused. Write ignored. Reads back 0.
4 AVG Read/Write When AVG is 1, averaging on the temperature and voltage measurements is turned off. This allows
measurements on each channel to be made much faster.
5 RATE Read/Write If averaging is turned off and measurement set to single channel mode, the RATE bit sets the
conversion rate. 0 = 32 conversions/second; 1 = 4 conversions/second.
6 SHDN Read/Write When SHDN is 1, the ADT7466 goes into shutdown mode. Both DAC outputs are set to 0 V to switch off
both fans. The DAC registers read back 0x00 to indicate that the fans are not being driven.
7 REM2 Read/Write Setting this bit configures AIN1 and AIN2 for connection of a second thermal diode. Setting this bit
overrides THER1 and THER2 in Configuration Register 3.

ADT7466ARQZ-RL7

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Board Mount Temperature Sensors RMT THRM CTR VLT MON
Lifecycle:
New from this manufacturer.
Delivery:
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