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MT4LSDT464HG-133G4

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22
32MB, 64MB, 128MB (x64, SR)
144-PIN SDRAM SODIMM
09005aef80748a77 Micron Technology, Inc., reserves the right to change products or specifications without notice.
SD4C4_8_16X64HG.fm - Rev. C 6/04 EN
10 ©2004 Micron Technology, Inc. All rights reserved.
Reserved states should not be used, because un-
known operation or incompatibility with future ver-
sions may result.
Operating Mode
The normal operating mode is selected by setting
M7 and M8 to zero; the other combinations of values
for M7 and M8 are reserved for future use and/or test
modes. The programmed burst length applies to both
READ and WRITE bursts.
Test modes and reserved states should not be used,
because unknown operation or incompatibility with
future versions may result.
Write Burst Mode
When M9 = 0, the burst length programmed via M0-
M2 applies to both READ and WRITE bursts; when
M9 = 1, the programmed burst length applies to READ
bursts, but write accesses are single-location (non-
burst) accesses.
Table 7: CAS Latency Table
ALLOWABLE OPERATING
CLOCK FREQUENCY (MHz)
SPEED CAS LATENCY = 2 CAS LATENCY = 3
-13E ≤ 133 ≤ 143
-133 ≤ 100 ≤ 133
-10E ≤ 100 NA
32MB, 64MB, 128MB (x64, SR)
144-PIN SDRAM SODIMM
09005aef80748a77 Micron Technology, Inc., reserves the right to change products or specifications without notice.
SD4C4_8_16X64HG.fm - Rev. C 6/04 EN
11 ©2004 Micron Technology, Inc. All rights reserved.
Commands
The Truth Table provides a quick reference of avail-
able commands. This is followed by written descrip-
tion of each command. For a more detailed des-
cription of commands and operations, refer to the
64Mb, 128Mb, or 256Mb SDRAM component data
sheet.
Table 8: Truth Table – SDRAM Commands and DQMB Operation
CKE is HIGH for all commands shown except SELF REFRESH
NAME (FUNCTION) CS# RAS# CAS# WE# DQMB ADDR DQ NOTES
COMMAND INHIBIT (NOP)
HX XX X X X
NO OPERATION (NOP)
LHHH X X X
ACTIVE (Select bank and activate row)
LLHHX Bank/
Row
X
1
NOTE:
1. A0–A11 (32MB and 64MB) , or A0–A12 (128MB) provide device row address, and BA0, BA1 determine which device bank
is made active.
READ (Select bank and column, and start READ burst)
LHLH
L/H
8
Bank/Col X
2
2. A0–A7 (32MB) or A0–A8 (64MB and 128MB) provide device column address; A10 HIGH enables the auto precharge fea-
ture (nonpersistent), while A10 LOW disables the auto precharge feature; BA0, BA1 determine which device bank is
being read from or written to.
WRITE (Select bank and column, and start WRITE
burst)
LHLL
L/H
8
Bank/Col Valid
2
BURST TERMINATE
LHHL X X Active
PRECHARGE (Deactivate row in bank or banks)
L L H L X Code X
3
3. A10 LOW: BA0, BA1 determine which device bank is being precharged. A10 HIGH: all device banks are precharged and
BA0, BA1 are “Don’t Care.”
AUTO REFRESH or SELF REFRESH
(Enter self refresh mode)
LLLHX X X
4
,
5
4. This command is AUTO REFRESH if CKE is HIGH, SELF REFRESH if CKE is LOW.
5. Internal refresh counter controls row addressing; all inputs and I/Os are “Don’t Care” except for CKE.
LOAD MODE REGISTER
L L L L X Op-code X
6
6. A0–A11 define the op-code written to the mode register; for 32MB and 64MB, A12 should be driven low.
Write Enable/Output Enable
–––– L – Active
7
7. Activates or deactivates the DQ during WRITEs (zero-clock delay) and READs (two-clock delay).
Write Inhibit/Output High-Z
––––H – High-Z
7
32MB, 64MB, 128MB (x64, SR)
144-PIN SDRAM SODIMM
09005aef80748a77 Micron Technology, Inc., reserves the right to change products or specifications without notice.
SD4C4_8_16X64HG.fm - Rev. C 6/04 EN
12 ©2004 Micron Technology, Inc. All rights reserved.
Absolute Maximum Ratings
Stresses greater than those listed may cause perma-
nent damage to the device. This is a stress rating only,
and functional operation of the device at these or any
other conditions above those indicated in the opera-
tional sections of this specification is not implied.
Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
Voltage on V
DD Supply
Relative to Vss . . . . . . . . . . . . . . . . . . . .-1V to +4.6V
Voltage on Inputs, NC or I/O Pins
Relative to Vss . . . . . . . . . . . . . . . . . . . .-1V to +4.6V
Operating Temperature
T
OPR
(Commercial - ambient) . . . . . 0°C to + 65°C
T
OPR
(Industrial - ambient). . . . . . --40°C to +85°C
Storage Temperature (plastic) . . . . . .-55°C to +150°C
Table 9: DC Electrical Characteristics and Operating Conditions
Notes: 1, 5, 6; notes appear on page 16; VDD, VDDQ = +3.3V ±0.3V
PARAMETER/CONDITION SYMBOL MIN MAX UNITS NOTES
SUPPLY VOLTAGE
V
DD, VDDQ3 3.6 V
INPUT HIGH VOLTAGE: Logic 1; All inputs
V
IH 2VDD +
0.3
V22
INPUT LOW VOLTAGE: Logic 0; All inputs
V
IL -0.3 0.8 V 22
INPUT LEAKAGE CURRENT:
Any input 0V ≤ VIN ≤ VDD
(All other pins not under test = 0V)
Command and
Address Inputs
II
-20 20 µA
33
CK, S#
-20 20 µA
DQMB
-5 5 µA
OUTPUT LEAKAGE CURRENT: DQ pins are
disabled; 0V ≤ V
OUT ≤ VDDQ
DQ
I
OZ
-5 5 µA
33
OUTPUT LEVELS:
Output High Voltage (I
OUT = -4mA)
Output Low Voltage (I
OUT = 4mA)
V
OH 2.4 – V
VOL –0.4 V
Table 10: IDD Specifications and Conditions – 32MB
Notes: 1, 5, 6, 11, 13; notes appear on page 16; VDD, VDDQ = +3.3V ±0.3V
MAX
PARAMETER/CONDITION SYMBOL -13E -133 -10E UNITS NOTES
OPERATING CURRENT: Active Mode; Burst = 2; READ or
WRITE;
t
RC =
t
RC (MIN)
I
DD1 500 460 380 mA 3, 18, 19, 29
STANDBY CURRENT: Power-Down Mode; All device device
banks idle; CKE = LOW
I
DD2 888mA 29
STANDBY CURRENT: Active Mode; CKE = HIGH; CS# = HIGH;
All device banks active after
t
RCD met; No accesses in
progress
I
DD3 180 180 140 mA 3, 12, 19, 29
OPERATING CURRENT: Burst Mode; Continuous burst; READ
or WRITE; All device banks active
I
DD4 600 560 480 mA 3, 18, 19, 29
AUTO REFRESH CURRENT
t
RFC =
t
RFC (MIN)
I
DD5 920 840 760 mA 3, 12, 18,
19, 29,30
CKE = HIGH; S# = HIGH
t
RFC = 15.625µs
I
DD6 12 12 12 mA
SELF REFRESH CURRENT: CKE ≤ 0.2V
(Low power not available with industrial
temperature option)
Standard I
DD7 444mA 3
Low Power (L) I
DD7 222mA
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22

MT4LSDT464HG-133G4

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Buy MT4LSDT464HG-133G4
Manufacturer:
Micron
Description:
MODULE SDRAM 32MB 144SODIMM
Lifecycle:
New from this manufacturer.
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