AD8110ASTZ Datasheet AD8110ASTZ, AD8111ASTZ | P16-P18

3&7#

AD8110/AD8111

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This will ensure that the programming matrix is always in a

known state. From then on, parallel programming can be used

to modify a single output or more at a time.

In a similar fashion, if both CE and UPDATE are taken LOW

after initial power-up, the random power-up data in the shift

prevent the crosspoint from being programmed into an unknown

state do not apply low logic levels to both CE and UPDATE after

power is initially applied. Programming the full shift register one

time to a desired state by either serial or parallel programming

after initial power-up will eliminate the possibility of program-

ming the matrix to an unknown state.

To change an output’s programming via parallel programming,

SER/PAR and UPDATE should be taken HIGH and CE should

be taken LOW. The CLK signal should be in the HIGH state.

The address of the output that is to be programmed should be

put on A0–A2. The first four data bits (D0–D3) should contain the

information that identifies the input that is programmed to the

output that is addressed. The fourth data bit (D4) will determine

the enabled state of the output. If D4 is LOW (output disabled),

the data on D0–D3 does not matter.

After the desired address and data signals have been established,

they can be latched into the shift register by a HIGH-to-LOW

transition of the CLK signal. The matrix will not be programmed,

however, until the UPDATE signal is taken low. Thus, it is

possible to latch in new data for several or all of the outputs first

via successive negative transitions of CLK while UPDATE is

held high, and then have all the new data take effect when

UPDATE goes LOW. This technique should be used when

programming the device for the first time after power-up when

using parallel programming.

POWER-ON RESET

When powering up the AD8110/AD8111 it is usually desirable

to have the outputs come up in the disabled state. The RESET

pin, when taken LOW will cause all outputs to be in the dis-

abled state. However, the RESET signal does not reset all registers

in the AD8110/AD8111. This is important when operating in

the parallel programming mode. Please refer to that section for

information about programming internal registers after power-

up. Serial programming will program the entire matrix each

time, so no special considerations apply.

Since the data in the shift register is random after power-up, it

should not be used to program the matrix or else the matrix can

enter unknown states. To prevent this, do not apply logic low signals

to both CE and UPDATE initially after power-up. The shift register

should first be loaded with the desired data, and then UPDATE

can be taken LOW to program the device.

The RESET pin has a 20 kΩ pull-up resistor to DVDD that can

be used to create a simple power-up reset circuit. A capacitor

from RESET to ground will hold RESET LOW for some time

while the rest of the device stabilizes. The LOW condition will

cause all the outputs to be disabled. The capacitor will then

charge through the pull-up resistor to the HIGH state; thus

allowing full programming capability of the device.

GAIN SELECTION

The 16 × 8 crosspoints come in two versions depending on the

desired gain of the analog circuit paths. The AD8110 device is

unity gain and can be used for analog logic switching and other

applications where unity gain is desired. The AD8110 can also

be used for the input and interior sections of larger crosspoint

arrays where termination of output signals is not usually used.

The AD8110 outputs have a very high impedance when their

outputs are disabled.

For devices that will be used to drive a terminated cable with its

outputs, the AD8111 can be used. This device has a built-in

gain of two that eliminates the need for a gain-of-two buffer to

drive a video line. Because of the presence of the feedback network

in these devices, the disabled output impedance is about 1 kΩ.

If external amplifiers are used to provide a gain = +2, Analog

Devices’ AD8079 provides a fixed G = +2 function.

CREATING LARGER CROSSPOINT ARRAYS

The AD8110/AD8111 are high-density building blocks for

creating crosspoint arrays of dimensions larger than 16 × 8.

Various features such as output disable, chip enable, and gain-

of-one- and-two options are useful for creating larger arrays.

For very large arrays, they can be used along with the AD8116,

a 16 × 16 video crosspoint device. In addition, when required

for customizing a crosspoint array size, they can be used with

the AD8108 and AD8109, a pair (unity gain and gain-of-two)

of 8 × 8 video crosspoint switches.

The first consideration in constructing a larger crosspoint is to

determine the minimum number of devices that are required.

The 16 × 8 architecture of the AD8110/AD8111 contains 128

“points,” which is a factor of 32 greater than a 4 × 1 crosspoint.

The PC board area and power consumption savings are readily

apparent when compared to using these smaller devices.

For a nonblocking crosspoint, the number of points required is

the product of the number of inputs multiplied by the number

of outputs. Nonblocking requires that the programming of a

given input to one or more outputs does not restrict the avail-

ability of that input to be a source for any other outputs.

Some nonblocking crosspoint architectures will require more

than this minimum as calculated above. Also, there are blocking

architectures that can be constructed with fewer devices than

this minimum. These systems have connectivity available on a

statistical basis that is determined when designing the overall system.

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AD8110/AD8111

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The basic concept in constructing larger crosspoint arrays is to

connect inputs in parallel in a horizontal direction and to

“wire-OR” the outputs together in the vertical direction. The

meaning of horizontal and vertical can best be understood by

looking at a diagram. Figure 6 illustrates this concept for a 32 × 8

crosspoint array.

AD8110

AD8111

TERM

IN 00–15

AD8110

AD8111

TERM

IN 16–31

Figure 6. A 32

8 Crosspoint Array Using Two AD8110s

or Two AD8111s

The inputs are each uniquely assigned to each of the 32 inputs

of the two devices and terminated appropriately. The outputs

are wire-ORed together in pairs. The output from only one of a

wired OR pair should be enabled at any given time. The device

programming software must be properly written to cause this

to happen.

At some point, the number of outputs that are wire-ORed becomes

too great to maintain system performance. This will vary according

to which system specifications are most important. It will also depend

on whether the matrix consists of AD8110s or AD8111s. The

output disabled impedance of the AD8110 is much higher than

that of the AD8111, so its disabled parasitics will have a smaller

effect on the one output that is enabled. For example, a 128 × 8

crosspoint can be created with eight AD8110/AD8111s. This

design will have 128 separate inputs and have the corresponding

outputs of each device wire-ORed together in groups of eight.

Using additional crosspoint devices in the design can lower the

number of outputs that must be wire-ORed together. Figure 7

shows a block diagram of a system using eight AD8110s and

two AD8111s to create a nonblocking, gain-of-two, 128 × 8

crosspoint that restricts the wire-ORing at the output to only

four outputs. These devices are the AD8110, which has a higher

disabled output impedance than the AD8111.

Additionally, by using the lower four outputs from each of the

two Rank 2 AD8111s, a blocking 128 × 16 crosspoint array can

be realized. There are, however, some drawbacks to this tech-

nique. The offset voltages of the various cascaded devices will

accumulate and the bandwidth limitations of the devices will

compound. In addition, the extra devices will consume more

current and take up more board space. Once again, the overall

system design specifications will determine how to make the

various tradeoffs.

TERM

IN 00–15

IN 16–31

IN 32–47

IN 48–63

IN 64–79

IN 80–95

IN 96–111

IN 112–127

RANK 2

16:8 NONBLOCKING

(16:16 BLOCKING)

RANK 1

(8 x AD8110)

128:16

TERM

AD8111

AD8110

1k

AD8111

OUT 00 – 07

NONBLOCKING

ADDITIONAL

8 OUTPUTS

(SUBJECT

TO BLOCKING)

Figure 7. A Gain-of-Two 128

8 Nonblocking Crosspoint Array (128

16 Blocking)

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AD8110/AD8111

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Multichannel Video

The excellent video specifications of the AD8110/AD8111 make

them ideal candidates for creating composite video crosspoint

switches. These can be made quite dense by taking advantage

of the AD8110/AD8111’s high level of integration and the fact

that composite video requires only one crosspoint channel per

system video channel. There are, however, other video formats

that can be routed with the AD8110/AD8111 requiring more

than one crosspoint channel per video channel.

Some systems use twisted-pair wiring to carry video signals.

These systems utilize differential signals and can lower costs

because they use lower cost cables, connectors and termination

methods. They also have the ability to lower crosstalk and reject

common-mode signals, which can be important for equipment

that operates in noisy environments or where common-mode volt-

ages are present between transmitting and receiving equipment.

In such systems, the video signals are differential; there is a

positive and negative (or inverted) version of the signals. These

complementary signals are transmitted onto each of the two

wires of the twisted pair, yielding a first order zero common-

mode signal. At the receive end, the signals are differentially

received and converted back into a single-ended signal.

When switching these differential signals, two channels are

required in the switching element to handle the two differential

signals that make up the video channel. Thus, one differential

video channel is assigned to a pair of crosspoint channels, both

input and output. For a single AD8110/AD8111, eight differen-

tial video channels can be assigned to the 16 inputs and four to

the outputs. This will effectively form an 8 × 4 differential cross-

point switch.

Programming such a device will require that inputs and outputs

be programmed in pairs. This information can be deduced by

inspection of the programming format of the AD8110/AD8111

and the requirements of the system.

There are other analog video formats requiring more than one

analog circuit per video channel. One two-circuit format that is

commonly being used in systems such as satellite TV, digital

cable boxes and higher quality VCRs, is called S-video or Y/C

video. This format carries the brightness (luminance or Y)

portion of the video signal on one channel and the color (chromi-

nance, chroma or C) on a second channel.

Since S-video also uses two separate circuits for one video chan-

nel, creating a crosspoint system requires assigning one video

channel to two crosspoint channels as in the case of a differential

video system. Aside from the nature of the video format, other

aspects of these two systems will be the same.

There are yet other video formats using three channels to carry

the video information. Video cameras produce RGB (red, green,

blue) directly from the image sensors. RGB is also the usual

format used by computers internally for graphics. RGB can also

be converted to Y, R-Y, B-Y format, sometimes called YUV

format. These three-circuit, video standards are referred to as

component analog video.

The component video standards require three crosspoint chan-

nels per video channel to handle the switching function. In a

fashion similar to the two-circuit video formats, the inputs and

outputs are assigned in groups of three and the appropriate logic

programming is performed to route the video signals.

CROSSTALK

Many systems, such as broadcast video, that handle numerous

analog signal channels have strict requirements for keeping the

various signals from influencing any of the others in the system.

Crosstalk is the term used to describe the coupling of the signals

of other nearby channels to a given channel.

When there are many signals in proximity in a system, as will

undoubtedly be the case in a system that uses the AD8110/

AD8111, the crosstalk issues can be quite complex. A good

understanding of the nature of crosstalk and some definition of

terms is required in order to specify a system that uses one or

more AD8110/AD8111s.

Types of Crosstalk

Crosstalk can be propagated by means of any of three meth-

ods. These fall into the categories of electric field, magnetic

field and sharing of common impedances. This section will explain

these effects.

Every conductor can be both a radiator of electric fields and a

receiver of electric fields. The electric field crosstalk mechanism

occurs when the electric field created by the transmitter propa-

gates across a stray capacitance (e.g., free space) and couples

with the receiver and induces a voltage. This voltage is an

unwanted crosstalk signal in any channel that receives it.

Currents flowing in conductors create magnetic fields that circulate

around the currents. These magnetic fields will then generate

voltages in any other conductors whose paths they link. The undes-

ired induced voltages in these other channels are crosstalk signals.

The channels that crosstalk can be said to have a mutual inductance

that couples signals from one channel to another.

The power supplies, grounds and other signal return paths of a

multichannel system are generally shared by the various chan-

nels. When a current from one channel flows in one of these

paths, a voltage that is developed across the impedance becomes

an input crosstalk signal for other channels that share the com-

mon impedance.

All these sources of crosstalk are vector quantities, so the magnitudes

cannot be simply added together to obtain the total crosstalk. In

fact, there are conditions where driving additional circuits in paral-

lel in a given configuration can actually reduce the crosstalk.

Areas of Crosstalk

For a practical AD8110/AD8111 circuit, it is required that it be

mounted to some sort of circuit board in order to connect it to

power supplies and measurement equipment. Great care has been

taken to create a characterization board that adds minimum

crosstalk to the intrin

sic device.This, however, raises the issue

that a system’s crosstalk is acombination of the intrinsic

crosstalk of the devices in additionto the circuit board to

which they are mounted. It is importantto try to separate these

two areas of crosstalk when attemptingto minimize its effect.

In addition, crosstalk can occur among the inputs to a cross-

point and among the outputs. It can also occur from input to

output. Techniques will be discussed for diagnosing which part

of a system is contributing to crosstalk.

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21

AD8110ASTZ

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Manufacturer:

Analog Devices Inc.

Description:

Analog & Digital Crosspoint ICs 260 MHz 16 x 8 Buffered

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AD8110ASTZ

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