Layout and Bypassing
For better noise immunity, bypass each of the voltage-
detector inputs to GND with a 0.1µF capacitor installed
as close to the device as possible. Bypass V
CC
and
DBP to GND with 1µF capacitors installed as close to
the device as possible. V
CC
(when not externally sup-
plied) and DBP are internally generated voltages and
should not be used to supply power to external circuitry.
Configuration Latency Period
A delay of less than 5µs occurs between writing to the
configuration registers and the time when these
changes actually take place, except when changing
one of the voltage-detector thresholds. Changing a
voltage-detector threshold typically takes 150µs. When
changing EEPROM contents, a software reboot or
cycling of power is required for these changes to trans-
fer to volatile memory.
MAX6884/MAX6885
EEPROM-Programmable, Hex
Power-Supply Supervisory Circuits
______________________________________________________________________________________ 31
Typical Operating Circuit
