1. Outline
S1V30120 Hardware Specification (Rev. 1.2) EPSON 1
1. Outline
The S1V30120 is a Speech Synthesis IC that provides a cost effective solution for adding Text-To-Speech
(TTS) and ADPCM speech processing applications to a range of portable devices. The highly integrated
design reduces overall system cost and time-to-market. The S1V30120 contains all the required analogue
codecs, memory, and EPSON-supplied embedded algorithms. All applications are controlled over a single
serial interface (SPI) allowing control from a wide range of hosts and rapid integration into existing products.
2. Features
Text To Speech Synthesis (TTS)
Fonix DECtalk® v5, fully parametric speech synthesis
Languages: US English, Castilian Spanish, Latin American Spanish
Nine pre-defined voices
Sampling rate: 11.025kHz
Audio reproduction (ADPCM)
ADPCM decoding (in Epson’s original format)
Bit rate: 80kbps, 64kbps, 48kbps, 40kbps, 32kbps and 24kbps
Sampling rate: 16, 8 kHz
Host interface
Synchronous serial interface (SPI interface is supported)
Command control
16-bit full-digital amplifier
Sampling rate (fs): 16, 11.025 and 8 kHz
Digital Input: 16 bits
Operating voltage: 3.3/1.8V
Clock
32.768KHz
Package
64-pin TQFP (10mm x 10mm) with 0.5mm-pitch pins
Supply voltage
3.3V (I/O power supply)
1.8V (Core power supply)
3. Pinout Diagram (Top View)
2 EPSON S1V30120 Hardware Specification (Rev. 1.2)
3. Pinout Diagram (Top View)
GPIOA8
GPIOA9
GPIOA0
LVDD
TSTMODE2
TSTMODE1
TSTMODE0
VSS
TESTEN
LVDD
EXCKM
HVDD
CLKI
PLLVSS
VCP
PLLVDD
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
HVDD
49 32
VSS
LVDD
50 31
SPPDN
VSS
51 30
SPHMT
GPIOA1
52 29
LVDD
GPIOA2
53 28
HVDD
GPIOA3
54 27
AVDD
GPIOA4
55 26
HPO
HVDD
56 25
AVSS
LVDD
57 24
LVDD
GPIOA5
58 23
VSS
GPIOA6
59 22
AUDCLK
GPIOA7
60 21
HPOP
VSS
61 20
LVDD
NRESET
62 19
TDO
SCANEN
63 18
HVDD
HVDD
64 17
HPON
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
GPIOA10
GPIOA11
LVDD
SCLK
SIN
VSS
SFRM1
HVDD
SOUT
SFRM2
LVDD
TCK
TMS
TDI
NTRST
VSS
S1V30120F00A***
[TQFP13-64]
Fig. 3-1 TQFP13-64 Package Pinout
4. Pin Description
S1V30120 Hardware Specification (Rev. 1.2) EPSON 3
4. Pin Description
Symbols
I = Input pin
O = Output pin
IO = Bi-directional pin
P = Power pin
Z = High impedance
I/O cells
Symbol Function
IC LVCMOS input
IH LVCMOS Schmitt-level input
ICP1 LVCMOS input with pull-up resistor 50k when 3.3V (typ)
ICD2 LVCMOS input with pull-down resistor (100k when 3.3V (typ))
O1 Output buffer (2mA/-2mA output current when 3.3V (typ))
O3 Output buffer (8mA/-8mA output current when 3.3V (typ))
T1 3-state output buffer (2mA/-2mA output current when 3.3V (typ))
BC1 Bi-directional IO buffer (2mA/-2mA output current when 3.3V (typ)
BC1P2 Bi-directional IO buffer with pull-up resistor (100k when 3.3V (typ)) (2mA/-2mA output current
when 3.3V(typ))
BC1D2 Bi-directional IO buffer with pull-down resistor (100k when 3.3V (typ)) (2mA/-2mA output current
when 3.3V (typ))
BC3D2 Bi-directional IO buffer with pull-down resistor (100k when 3.3V (typ)) (8mA/-8mA output current
when 3.3V(typ))
LOT Transparent Output
ITST1 Test input with pull-down resistor (120k when 1.8V (typ))
Clock synchronous serial interface
Pin Name Pin I/O
I/O Cell
Type
RESET#
State
Power Pin Description
SIN 5 IO BC1 Z HVDD Serial data input
SCLK 4 IO BC1 Z HVDD Serial clock input
SFRM1 7 IO BC3P2 Z HVDD Slave device select input
SOUT 9 IO BC3P2 Pull-up HVDD Serial data output
SFRM2 10 IO O3 L HVDD Master device select output
GPIO
Pin Name Pin I/O
I/O Cell
Type
RESET#
State
Power Pin Description
GPIOA[11:0] 2,1,47,48,60,59,58,
55,54,53,52,46
IO BC1D2 Pull-down HVDD General-purpose IO port

S1V30120F01A100

Mfr. #:
Manufacturer:
Epson ICs
Description:
Audio DSPs Text-to-Speech Audio Processor
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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