LTC3879
10
3879f
OPERATION
Main Control Loop
The LTC3879 is a valley current mode controller IC for
use in DC/DC step-down converters. In normal continu-
ous operation, the top MOSFET is turned on for a fi xed
interval determined by a one-shot timer, OST. When the
top MOSFET is turned off, the bottom MOSFET is turned
on until the current comparator, I
CMP
, trips, restarting
the one-shot timer and initiating the next cycle. Inductor
valley current is measured by sensing the voltage between
the PGND and SW pins using the bottom MOSFET on-
resistance. The voltage on the I
TH
pin sets the compara-
tor threshold corresponding to inductor valley current.
The error amplifi er EA adjusts this voltage by comparing
the feedback signal V
FB
from the output voltage to the
feedback reference voltage V
FBREF
. Increasing the load
current causes a drop in the feedback voltage relative
to the reference. The EA senses the feedback voltage
drop and adjusts the I
TH
voltage higher until the average
inductor current matches the load current.
With DC current loads less than 1/2 of the peak-to-peak
ripple the inductor current can drop to zero or become
negative. In discontinuous operation, negative inductor
current is detected and prevented by the current reversal
comparator I
REV
, which shuts off MB. Both switches remain
off with the output capacitor supplying the load current
until the EA moves the I
TH
voltage above the zero current
level (0.8V) to initiate another switching cycle. When the
MODE pin is below the internal threshold reference, V
MODE
,
the regulator is forced to operate in continuous mode by
disabling reversal comparator, I
REV
, thereby allowing the
inductor current to become negative.
The continuous mode operating frequency can be deter-
mined by dividing the calculated duty cycle, V
OUT
/V
IN
,
by the fi xed on-time. The OST generates an on-time
proportional to the ideal duty cycle, thus holding the
frequency approximately constant with changes in V
IN
.
The nominal frequency can be adjusted with an external
resistor, R
ON
.
Foldback current limiting is provided to protect against
low impedance shorts. If the controller is in current limit
and V
OUT
drops to less 50% of regulation, the current limit
set-point “folds back” to progressively lower values. To
recover from foldback current limit, the excessive load or
low impedance short needs to be removed.
When RUN is less than 0.7V, the LTC3879 is in the low
power shutdown state with a nominal bias current of
18μA. When RUN is greater than 0.7V and less than 1.5V,
INTV
CC
and all internal circuitry are enabled while TG and
BG are forced low. When RUN is taken greater than 1.5V,
switching begins and the TRACK/SS pin is released from
ground. The output voltage follows the TRACK/SS input
multiplied by feedback factor when TRACK/SS is less than
0.6V. Soft-start is complete when TRACK/SS exceeds the
internal 0.6V reference voltage and regulates normally.
LTC3879
11
3879f
APPLICATIONS INFORMATION
The basic LTC3879 application circuit is shown on the fi rst
page of this data sheet. External component selection is
largely determined by maximum load current and begins
with the selection of sense resistance and power MOSFET
switches. The LTC3879 uses the on-resistance of the syn-
chronous power MOSFET to determine the inductor current.
The desired ripple current and operating frequency largely
determines the inductor value. Finally, C
IN
is selected for its
ability to handle the large RMS current into the converter,
and C
OUT
is chosen with low enough ESR to meet output
voltage ripple and transient specifi cations.
Maximum V
DS
Sense Voltage and V
RNG
Pin
Inductor current is measured by sensing the bottom
MOSFET V
DS
voltage that appears between the PGND
and SW pins. The maximum allowed V
DS
sense voltage is
set by the voltage applied to the V
RNG
pin and is approxi-
mately equal to (0.133)V
RNG
. The current mode control
loop does not allow the inductor current valleys to exceed
(0.133)V
RNG
. In practice, one should allow margin, to ac-
count for variations in the LTC3879 and external component
values. A good guide for setting V
RNG
is:
V
RNG
= 7.5 • (Maximum V
DS
Sense Voltage)
An external resistive divider from INTV
CC
can be used
to set the voltage on the V
RNG
pin between 0.2V and 2V,
resulting in peak sense voltages between 26.6mV and
266mV. The wide peak voltage sense range allows for a
variety of applications and MOSFET choices. The V
RNG
pin
can also be tied to either SGND or INTV
CC
to force internal
defaults. When V
RNG
is tied to SGND, the device operates
at a valley current sense threshld of 30mV typical. If V
RNG
is tied to INTV
CC
, the device operates at a valley current
sense threshold of 75mV typical.
Power MOSFET Selection
The LTC3879 requires two external N-channel power
MOSFETs, one for the top (main) switch and one for the
bottom (synchronous) switch. Important parameters for
the power MOSFETs are the breakdown voltage V
BR(DSS)
,
threshold voltage V
GS(TH)
, on-resistance R
DS(ON)
, re-
verse transfer capacitance C
RSS
and maximum current
I
DS(MAX)
.
The gate drive voltages are set by the 5.3V INTV
CC
supply.
Consequently, logic-level threshold MOSFETs must be used
in LTC3879 applications. If the input voltage is expected
to drop below 5V, then sub-logic level threshold MOSFETs
should be considered.
Using the bottom MOSFET as the current sense element
requires particular attention be paid to its on-resistance.
MOSFET on-resistance is typically specifi ed with a maxi-
mum value R
DS(ON)(MAX)
at 25°C. In this case additional
margin is required to accommodate the rise in MOSFET
on-resistance with temperature.
R
Max V Sense Voltage
I
DS ON MAX
DS
OT
()( )

=
ρ
The ρ
T
term is a normalization factor (unity at 25°C)
accounting for the signifi cant variation in on-resistance
with temperature, typically about 0.4%/°C, as shown in
Figure 1. For a maximum junction temperature of 100°C
using a value of ρ
T
= 1.3 is reasonable.
The power dissipated by the top and bottom MOSFETs
depends upon their respective duty cycles and the load
current. When the LTC3879 is operating in continuous
mode, the duty cycles for the MOSFETs are:
D
V
V
D
VV
V
TOP
OUT
IN
BOT
IN OUT
IN
=
=
Figure 1. R
DS(ON)
vs Temperature
JUNCTION TEMPERATURE (°C)
–50
R
T
NORMALIZED ON-RESISTANCE (Ω)
1.0
1.5
150
3879 F01
0.5
0
0
50
100
2.0
LTC3879
12
3879f
The resulting power dissipation in the MOSFETs at maxi-
mum output current are:
PDI R
V
TOP TOP OUT MAX TOP DS ON MAX
=
+
••
() () ()()
2
ρ
τ
IIN
OUT MAX
MILLER
TGHIGH
INTVC
I
C
DR
V
2
2
()
()
CC MILLER
TGLOW
MILLER
OSC
BOT BO
V
DR
V
f
PD
+
=
TT OUT MAX BOT DS ON MAX
IR••
() () ()()
2
ρ
τ
DR
TGHIGH
is pull-up driver resistance and DR
TGLOW
is the
TG driver pull-down resistance. V
MILLER
is the Miller ef-
fect V
GS
voltage and is taken graphically from the power
MOSFET data sheet.
MOSFET input capacitance is a combination of several
components but can be taken from the typical “gate charge”
curve included on the most data sheets (Figure 2). The
curve is generated by forcing a constant input current
into the gate of a common source, current source, loaded
stage and then plotting the gate versus time. The initial
slope is the effect of the gate-to-source and gate-to-drain
capacitance. The fl at portion of the curve is the result of the
Miller multiplication effect of the drain-to-gate capacitance
as the drain drops the voltage across the current source
load. The upper sloping line is due to the drain-to-gate
accumulation capacitance and the gate-to-source capaci-
tance. The Miller charge (the increase in coulombs on the
horizontal axis from a to b while the curve is fl at) is speci-
ed from a given V
DS
drain voltage, but can be adjusted
for different V
DS
voltages by multiplying by the ratio of
the application V
DS
to the curve specifi ed V
DS
values. A
way to estimate the C
MILLER
term is to take the change in
gate charge from points a and b or the parameter Q
GD
on
a manufacturers data sheet and divide by the specifi ed
V
DS
test voltage, V
DS(TEST)
.
C
Q
V
MILLER
GD
DS TEST
=
()
C
MILLER
is the most important selection criteria for deter-
mining the transition loss term in the top MOSFET but is
not directly specifi ed on MOSFET data sheets.
Both MOSFETs have I
2
R power loss, and the top MOSFET
includes an additional term for transition loss, which are
highest at high input voltages. For V
IN
< 20V, the high cur-
rent effi ciency generally improves with larger MOSFETs,
while for V
IN
> 20V, the transition losses rapidly increase
to the point that the use of a higher R
DS(ON)
device with
lower C
MILLER
actually provides higher effi ciency. The
synchronous MOSFET losses are greatest at high input
voltage when the top switch duty factor is low or during
a short-circuit when the synchronous switch is on close
to 100% of the period.
Operating Frequency
The choice of operating frequency is a tradeoff between
effi ciency and component size. Lowering the operating fre-
quency improves effi ciency by reducing MOSFET switching
losses but requires larger inductance and/or capacitance
to maintain low output ripple voltage. Conversely, raising
the operating frequency degrades effi ciency but reduces
component size.
The operating frequency of LTC3879 applications is de-
termined implicitly by the one-shot timer that controls the
on-time, t
ON
, of the top MOSFET switch. The on-time is
set by the current into the I
ON
pin according to:
t
V
I
pF
ON
ION
=
()
07
10
.
Tying a resistor R
ON
from V
IN
to the I
ON
pin yields an
on-time inversely proportional to V
IN
. For a step-down
converter, this results in pseudo fi xed frequency operation
as the input supply varies.
f
V
VR pF
Hz
OP
OUT
ON
=
()
07 10.•
[]
+
V
DS
V
IN
3879 F02
V
GS
MILLER EFFECT
Q
IN
ab
C
MILLER
= (Q
B
– Q
A
)/V
DS
V
GS
V
+
Figure 2. Gate Charge Characteristic
APPLICATIONS INFORMATION

LTC3879IMSE#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Fast, Wide Operating Range No Rsense Step-Down Controller
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union