LTC3879
8
3879f
PIN FUNCTIONS
TRACK/SS (Pin 1): External Tracking and Soft-Start Input.
The LTC3879 regulates V
FB
to the smaller of 0.6V or the
voltage on the TRACK/SS pin. An internal 1μA pull-up
current source is connected to this pin. A capacitor to
ground at this pin sets the ramp time to the fi nal regulated
output voltage. Alternatively, a resistor divider on another
voltage supply connected to this pin allows the output to
track the other supply during start-up.
PGOOD (Pin 2): Power Good Output. This open-drain
logic output is pulled to ground when the output voltage is
outside of a ±10% window around the regulation point.
V
RNG
(Pin 3): V
DS
Sense Voltage Range Input. The maxi-
mum allowed bottom MOSFET V
DS
sense voltage between
SW and PGND is equal to (0.133)V
RNG
. The voltage applied
to V
RNG
can be any value between 0.2V and 2V. If V
RNG
is
tied to SGND, the device operates with a maximum valley
current sense threshold of 30mV typical. If V
RNG
is tied
to INTV
CC
, the device operates with a maximum valley
current sense threshold of 75mV typical.
MODE (Pin 4): MODE Input. Connect this pin to INTV
CC
to
enable discontinuous mode for light load operation. Con-
nect this pin to SGND to force continuous mode operation
in all conditions.
I
TH
(Pin 5): Current Control Threshold and Error Amplifi er
Compensation Point. The current comparator threshold
increases with this control voltage. The voltage ranges
from 0V to 2.4V, with 0.8V corresponding to zero sense
voltage (zero current).
SGND (Pin 6): Signal Ground. All small-signal components
should be connected to SGND. Connect SGND to PGND
using a single PCB trace.
I
ON
(Pin 7): On-Time Current Input. Tie a resistor from
V
IN
to this pin to set the one-shot timer current and thus
the switching frequency.
V
FB
(Pin 8): Error Amplifi er Feedback Input. This pin con-
nects the error amplifi er to an external resistive divider
from V
OUT
.
RUN (Pin 9): Run Control Input. RUN below 1.5V disables
switching by forcing TG and BG low. RUN less than 1.5V
but greater than 0.7V enables all internal bias including
the INTV
CC
output. RUN below 0.7V shuts down all bias
and places the LTC3879 into micropower shutdown mode
of approximately 18μA. There is an internal 1.2μA pull-up
current source for operation with an open-collector RUN
signal.
V
IN
(Pin 10): Main Input Supply. The supply voltage can
range from 4V to 38V. For increased noise immunity de-
couple this pin to PGND with an RC fi lter.
INTV
CC
(Pin 11): Internal 5.3V Regulator Output. The
driver and control circuits are powered from this voltage.
Decouple this pin to PGND with a minimum of 1μF, 10V
X5R or X7R ceramic capacitor.
BG (Pin 12): Bottom Gate Drive. This pin drives the gate
of the bottom N-Channel power MOSFET between PGND
and INTV
CC
.
PGND (Pin 13): Power Ground. Connect this pin as close
as practical to the source of the bottom N-channel power
MOSFET, the (–) terminal of C
INTVCC
and the (–) terminal
of C
VIN
.
SW (Pin 14): Switch Node. The (–) terminal of the bootstrap
capacitor, C
B
, connects to this node. This pin swings from
a diode voltage below ground up to V
IN
.
TG (Pin 15): Top Gate Drive. This pin drives the gate of the
top N-channel power MOSFET between SW and BOOST.
BOOST (Pin 16): Boosted Floating Driver Supply. The (+)
terminal of the bootstrap capacitor, C
B
, connects to this
node. This node swings from (INTV
CC
– V
SCHOTTKY
) to
V
IN
+ (INT
VCC
– V
SCHOTTKY
).
Exposed Pad (Pin 17): The Exposed Pad is SGND and
must be soldered to the PCB.
