ams Datasheet Page 21
[v1-10] 2018-Mar-08 Document Feedback
TCS3430 − Register Description
CH3DATAL Register (0x9A)
Figure 33:
CH3DATAL Register
CH3DATAH Register (0x9B)
Figure 34:
CH3DATAH Register
CFG2 Register (0x9F)
Figure 35:
CFG2 Register
0x9A: CH3DATAL
Field Name Reset Type Description
7:0 CH3DATAL 0 RO
Low Byte of CH3 ADC data.
If AMUX = 0 contains X data.
If AMUX = 1 contains IR2 data.
Default = X data.
0x9B: CH3DATAH
Field Name Reset Type Description
7:0 CH3DATAH 0 RO
High Byte of CH3 ADC data.
If AMUX = 0 contains X data.
If AMUX = 1 contains IR2 data.
Default = X data.
0x9F: CFG2
Field Name Reset Type Description
7:5 Reserved 000 RW Reserved. Set to 000.
4HGAIN0RW
High 128x gain. If this bit is set and AGAIN in the CFG1
register is set to 11, then the 128x gain mode will be
enabled.
3:0 Reserved 0100 RW Reserved. Set to 0100.