3 mW, 100 kSPS,
16-Bit ADC in 6-Lead SOT-23
AD7680
Rev. A
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FEATURES
Fast throughput rate: 100 kSPS
Specified for V
DD
of 2.5 V to 5.5 V
Low power
3 mW typ at 100 kSPS with 2.5 V supply
3.9 mW typ at 100 kSPS with 3 V supply
16.7 mW typ at 100 kSPS with 5 V supply
Wide input bandwidth
86 dB SNR at 10 kHz input frequency
Flexible power/serial clock speed management
No pipeline delays
High speed serial interface
SPI®/QSPI™/μWire/DSP compatible
Standby mode: 0.5 μA max
6-Lead SOT-23 and 8-Lead MSOP packages
APPLICATIONS
Battery-powered systems:
Personal digital assistants
Medical instruments
Mobile communications
Instrumentation and control systems
Remote data acquisition systems
High speed modems
Optical sensors
FUNCTIONAL BLOCK DIAGRAM
03643-0-001
V
IN
V
DD
GND
AD7680
SCLK
SDATA
CS
T/H
16-BIT SUCCESSIVE
APPROXIMATION
ADC
CONTROL
LOGIC
Figure 1.
Table 1. MSOP/SOT-23 16-Bit PulSAR ADC
Type/kSPS 100 kSPS 250 kSPS 500 kSPS
True Differential AD7684 AD7687 AD7688
Pseudo Differential AD7683 AD7685 AD7686
Unipolar AD7680
GENERAL DESCRIPTION
The AD7680 is a 16-bit, fast, low power, successive
approximation ADC. The part operates from a single 2.5 V to
5.5 V power supply and features throughput rates up to 100 kSPS.
The part contains a low noise, wide bandwidth track-and-hold
amplifier that can handle input frequencies in excess of 7 MHz.
The conversion process and data acquisition are controlled
using
CS
and the serial clock, allowing the devices to interface
with microprocessors or DSPs. The input signal is sampled on
the falling edge of
CS
and the conversion is also initiated at this
point. There are no pipeline delays associated with the part.
The AD7680 uses advanced design techniques to achieve very
low power dissipation at fast throughput rates. The reference for
the part is taken internally from V
DD
, which allows the widest
dynamic input range to the ADC. Thus, the analog input range
for this part is 0 V to V
DD
. The conversion rate is determined by
the SCLK frequency.
PRODUCT HIGHLIGHTS
1. First 16-bit ADC in a SOT-23 package.
2. High throughput with low power consumption.
3. Flexible power/serial clock speed management. The
conversion rate is determined by the serial clock, allowing
the conversion time to be reduced through the serial clock
speed increase. This allows the average power consumption
to be reduced when a power-down mode is used while not
converting. The part also features a shutdown mode to
maximize power efficiency at lower throughput rates.
Power consumption is 0.5 μA max when in shutdown.
4. Reference derived from the power supply.
5. No pipeline delays.
This part features a standard successive approximation ADC
with accurate control of the sampling instant via a
CS
input and
once-off conversion control.
