LTC1922-1
13
OPERATIO
U
Off-Line Bias Supply Generation
If a regulated bias supply is not available to provide V
CC
voltage to the LTC1922-1 and supporting circuitry, one
must be generated. Since the power requirement is small,
approximately 1W, and the regulation is not critical, a
simple open-loop method is usually the easiest and lowest
cost approach. One method that works well is to add a
winding to the main power transformer, and post regulate
the resultant square wave with an L-C filter (see Figure␣ 5a).
The advantage of this approach is that it maintains decent
regulation as the supply voltage varies, and it does not
require full safety isolation from the input winding of the
transformer. Some manufacturers include a primary wind-
ing for this purpose in their standard product offerings as
well. A different approach is to add a winding to the output
inductor and peak detect and filter the square wave signal
(see Figure 5b). The polarity of this winding is designed so
that the positive voltage square wave is produced while the
output inductor is freewheeling. An advantage of this
technique over the previous is that it does not require a
separate filter inductor and since the voltage is derived
from the well-regulated output voltage, it is also well
controlled. One disadvantage is that this winding will
require the same safety isolation that is required for the
main transformer. Another disadvantage is that a much
larger V
CC
filter capacitor is needed, since it does not
generate a voltage as the output is first starting up, or
during short-circuit conditions.
Programming the LTC1922-1 Oscillator
The high accuracy LTC1922-1 oscillator circuit provides
flexibility to program the switching frequency, slope com-
pensation, and synchronization with minimal external
components. The LTC1922-1 oscillator circuitry produces
a 3.8V peak-to-peak amplitude ramp waveform on C
T
and
a narrow pulse on SYNC that can be used to synchronize
other PWM chips. Typical maximum duty cycles of 99%
are obtained at 300kHz and 97% at 1MHz. The large
amplitude ramp provides a high degree of noise margin. A
compensating slope current is derived from the oscillator
ramp waveform and sourced out of CS.
The desired amount of slope compensation is selected
with single external resistor (or no resistor), if not re-
quired. A capacitor to GND on C
T
programs the switching
frequency. The C
T
ramp discharge current is internally set
to a high value (>10mA). The dedicated SYNC I/O pin easily
achieves synchronization. The LTC1922-1 can be set up to
either synchronize other PWM chips or be synchronized
by another chip or external clock source. The 1.8V SYNC
threshold allows the LTC1922-1 to be synchronized di-
rectly from all standard 3V and 5V logic families.
Design Procedure:
1. Choose C
T
for the desired oscillator frequency. The
switching frequency selected must be consistent with the
power magnetics and output power level. This is detailed
in the Transformer Design section. In general, increasing
the switching frequency will decrease the maximum achiev-
able output power, due to limitations of maximum duty
cycle imposed by transformer core reset and ZVS. Re-
member that the output frequency is 1/2 that of the
oscillator.
C
T
= 1/(20k • f
OSC
)
Example: Desired f
OSC
= 330kHz
C
T
= 1/(20k • 330kHz) = 152pF, choose closest standard
value of 150pF. A 5% or better tolerance multilayer NPO
or X7R ceramic capacitor is recommended for best
performance.
1922 F05b
V
CC
V
OUT
V
IN
C
HOLD
R
START
+
0.1µF
L
OUT
ISO BARRIER
Figure 5a. Auxiliary Winding Bias Supply
Figure 5b. Output Inductor Bias Supply
1922 F05a
+
V
CC
V
IN
C
HOLD
0.1µF
R
START
2k
15V*
*OPTIONAL
LTC1922-1
14
3. Slope compensation is required for most peak current
mode controllers in order to prevent subharmonic oscilla-
tion of the current control loop. In general, if the system
duty cycle exceeds 50% in a fixed frequency, continuous
current mode converter, an unstable condition exists
within the current control loop. Any perturbation in the
current signal is amplified by the PWM modulator result-
ing in an unstable condition. Some common manifesta-
tions of this include alternate pulse nonuniformity and
pulse width jitter. Fortunately, this can be addressed by
adding a corrective slope to the current sense signal or by
subtracting the same slope from the current command
signal (error amplifier output). In theory, the current
doubler output configuration does not require slope com-
pensation since the output inductor duty cycles only
approach 50%. However, transient conditions can mo-
mentarily cause higher duty cycles and therefore, the
possibility for unstable operation. The exact amount of
required slope compensation is easily programmed by the
LTC1922-1 with the addition of a single external resistor
(see Figure 7). The LTC1922-1 generates a current that is
proportional to the instantaneous voltage on C
T
,
OPERATIO
U
(33µA/V
(CT)
). Thus, at the peak of C
T
, this current is
approximately 125µA and is output from the CS pin. A
resistor connected between CS and the external current
sense resistor sums in the required amount of slope
compensation. The value of this resistor is dependent on
several factors including minimum V
IN
, V
OUT
, switching
frequency, current sense resistor value and output induc-
tor value. An illustrative example with the design equation
is provided below.
Example: V
IN
= 36V to 72V
V
OUT
= 3.3V
I
OUT
= 40A
L = 2.2µH
Transformer turns ratio (N) = V
IN(MIN)
• D
MAX
/
V
OUT
␣=␣3
R
CS
= 0.025
f
SW
= 300kHz, i.e., transformer f = f
SW
/2 = 150kHz
R
SLOPE
= V
O
• R
CS
/(2 • L • f
T
125µA • N) = 3.3V • 0.025/
(2 • 2.2µA • 100k • 125µA • 3)
R
SLOPE
= 500, choose the next higher standard value
to account for tolerances in I
SLOPE
, R
CS
, N and L.
LTC1922-1
LTC1922-1
LTC1922-1
C
T
C
T
C
T
C
T
C
T
C
T
SYNC
SYNC
SYNC
5.1k
5.1k
5.1k
1k
1k
UP TO
5 SLAVES
SLAVES
MASTER
C
T
OF SLAVE(S) IS
1.25 C
T
OF MASTER.
1922 F06a
LTC1922-1
C
T
C
T
SYNC
5.1k
1k
1922 F06b
EXTERNAL
FREQUENCY
SOURCE
AMPLITUDE > 1.8V
12.5ns < PW < 0.4/ƒ
Figure 6a. SYNC Output (Master Mode)
Figure 6b. SYNC Input from an External Source
Figure 7. Slope Compensation Circuitry
2. The LTC1922-1 can either synchronize other PWMs, or
be synchronized to an external frequency source or PWM
chip. See Figure 6 for details.
Current Sensing and Overcurrent Protection
Current sensing provides feedback for the current mode
control loop and protection from overload conditions. The
LTC1922-1 is compatible with either resistive sensing or
current transformer methods. Internally connected to the
LTC1922-1 CS pin are two comparators that provide
pulse-by-pulse and overcurrent shutdown functions re-
spectively. (See Figure 8)
BRIDGE
CURRENT
CURRENT SENSE
WAVEFORM
V(C
T
)
33k
I =
CS
C
T
33k
ADDED
SLOPE
R
SLOPE
R
CS
1922 F07
LTC1922-1
LTC1922-1
15
The pulse-by-pulse comparator has a 400mV nominal
threshold, which can reduce sense resistor losses by 67%
compared to previous solutions. This corresponds to 3W
in a 200W, 48V to 3.3V converter. If the 400mV threshold
is exceeded, the PWM cycle is terminated. The overcurrent
comparator is set approximately 50% higher than the
pulse-by-pulse level. If the current signal exceeds this
level, the PWM cycle is terminated, the soft-start capacitor
is quickly discharged and a soft-start cycle is initiated. If
the overcurrent condition persists, the LTC1922-1 halts
PWM operation and waits for the soft-start capacitor to
charge up to approximately 4V before a retry is allowed.
The soft-start capacitor is charged by an internal 12µA
current source. If the fault condition has not cleared when
soft-start reaches 4V, the soft-start pin is again dis-
charged and a new cycle is initiated. This is referred to as
hiccup mode operation. In normal operation and under
most abnormal conditions, the pulse-by-pulse compara-
tor is fast enough to prevent hiccup mode operation. In
severe cases, however, with high input voltage, very low
RDS
(ON)
MOSFETs and a shorted output, or with saturat-
ing magnetics, the overcurrent comparator provides a
means of protecting the power converter.
Leading Edge Blanking
The LTC1922-1 provides programmable leading edge
blanking to prevent nuisance tripping of the current sense
circuitry. Although the ZVS full-bridge topology is some-
what more immune to leading edge noise spikes than
other types of converters, they are not totally eliminated.
Leading edge blanking relieves the filtering requirements
for the CS pin, greatly improving the response to real
overcurrent conditions. It also allows the use of a ground
referenced current sense resistor or transformer(s), fur-
ther simplifying the design. With a single 10k to 100k
resistor from R
LEB
to GND, blanking times of approxi-
mately 40ns to 320ns are programmed. If not required,
connecting R
LEB
to V
REF
can disable leading edge blank-
ing. Keep in mind that the use of leading edge blanking will
set a minimum linear control range for the phase modula-
tion circuitry.
Resistive Sensing
A resistor connected between input common and the
sources of MB and MD is the simplest, fastest and most
accurate method of current sensing for the full-bridge
converter. This is the preferred method for low to moder-
ate power levels. A graph of resistive sense power losses
vs output power is shown Figure 9. The sense resistor
should be chosen such that the maximum rated output
current for the converter can be delivered at the lowest
expected V
IN
. Use the following formula to calculate the
optimal value for R
CS
.
+
+
OVERLOAD
CURRENT LIMIT
400mV
600mV
φ
MOD
UVLO
ENABLE
UVLO
ENABLE
R
SQ
R
SQ
Q
Q
S
Q
PWM
LOGIC
H = SHUTDOWN
OUTPUTS
CS
R
CS
+
+
C
SS
SS
0.4V
4.1V
12µA
1922 F08
PULSE BY PULSE
CURRENT LIMIT
PWM
LATCH
Figure 8. Current Sense/Fault Circuitry Detail
OPERATIO
U

LTC1922IN-1#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Sync PhModulated Full-Bridge Cntr
Lifecycle:
New from this manufacturer.
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