LTC1922-1
6
PIN FUNCTIONS
UUU
SYNC (Pin 1): Synchronization Input/Output for the
Oscillator. Terminate SYNC with a 5.1k resistor to GND.
RAMP (Pin 2): Input to Phase Modulator Comparator. The
voltage on RAMP is internally level shifted by 400mV.
CS (Pin 3): Input to Current Limit Comparators, Output of
Slope Compensation Circuitry.
COMP (Pin 4): Error Amplifier Output, Input to Phase
Modulator.
R
LEB
(Pin 5): Timing Resistor for Leading Edge Blanking.
Use a 10k to 100k resistor to program from 40ns to 310ns
of leading edge blanking. A ±1% tolerance resistor is
recommended. Leading edge blanking may be defeated by
connecting R
LEB
to V
REF
.
FB (Pin 6): Error Amplifier Inverting Input. This is the
voltage feedback input for the LTC1922-1.
SS (Pin 7): Soft-Start/Restart Delay Circuitry Timing
Capacitor.
PDLY (Pin 8): Passive Leg Delay Circuit Input.
SBUS (Pin 9): Input (Bus) Voltage Sensing Input.
ADLY (Pin 10): Active Leg Delay Circuit Input.
V
REF
(Pin 11): 5V Reference Output. V
REF
is capable of
supplying up to 15mA to external circuitry. Bypass V
REF
with a 1µF (minimum) ceramic capacitor to GND.
OUTF (Pin 12): 50mA Driver Output for Secondary Side
Current Doubler Synchronous Rectifier.
OUTE (Pin 13): 50mA Driver Output for Secondary Side
Current Doubler Synchronous Rectifier.
OUTD (Pin 14): 50mA Driver Output for Active Leg Low
Side.
V
CC
(Pin 15): Chip Power Supply Input, 10.3V Shunt
Regulator. Bypass V
CC
with a 0.1µF or larger ceramic
capacitor to GND.
OUTC (Pin 16): 50mA Driver Output for Active Leg High
Side.
OUTB (Pin 17): 50mA Driver Output for Passive Leg Low
Side.
OUTA (Pin 18): 50mA Driver Output for Passive Leg High
Side.
GND (Pin 19): All Voltages on the LTC1922-1 Are Referred
to GND.
C
T
(Pin 20): Timing Capacitor for Oscillator. Use ±5% or
better multilayer NPO ceramic for best results.
