LTC1922-1
16
If RAMP and CS are connected together:
R
VAR
I PEAK
CS
SLOPE
P
=
µ0 4 125.–( )
()
I PEAK
I
N EFF
VD
Lf
VD
LfN
P
O MAX IN MAX MIN
MAG CLK
OMIN
OUT CLK
()
••
••
(– )
••
() ()
=+ +
2
2
1
where: N = Transformer turns ratio
If RAMP and CS are separated
R
V
I PEAK
CS
P
=
04.
()
Current Transformer Sensing
A current sense transformer can be used in lieu of resistive
sensing with the LTC1922-1. Current sense transformers
are available in many styles from several manufacturers.
A typical sense transformer for this application will use a
1:50 turns ratio (N), so that the sense resistor value is N
times larger, and the secondary current N times smaller
than in the resistive sense case. Therefore, the sense
resistor power loss is about N times less with the trans-
former method, neglecting the transformers core and
copper losses. The disadvantages of this approach
include, higher cost and complexity, lower accuracy, core
reset/max duty cycle limitations and lower speed. Never-
theless, for very high power applications, this method is
preferred. The sense transformer primary is placed in the
same location as the ground referenced sense resistor, or
between the upper MOSFET drains in the (MA, MC) and
V
IN
. The advantage of the high side location is a greater
immunity to leading edge noise spikes, since gate charge
current and reflected rectifier recovery current are largely
eliminated. Figure 10 illustrates a typical current sense
transformer based sensing scheme. R
S
in this case is
calculated the same as in the resistive case, only its value
is increased by the sense transformer turns ratio. At high
duty cycles, it may become difficult or impossible to reset
the current transformer. This is because the required
transformer reset voltage increases as the available time
for reset decreases to equalize the (volt • seconds) applied.
The interwinding capacitance and secondary inductance
of the current sense transformer form a resonant circuit
that limits the dV/dT on the secondary of the CS trans-
former. This in turn limits the maximum achievable duty
cycle for the CS transformer. Attempts to operate beyond
this limit will cause the transformer core to “walk” and
eventually saturate, opening up the current feedback loop.
Common methods to address this limitation include:
1. Reducing the maximum duty cycle by lowering the
power transformer turns ratio.
2. Reducing the switching frequency of the converter.
3. Employ external active reset circuitry.
4. Using two CS transformers summed together.
5. Choose a CS transformer optimized for high frequency
applications.
OUTPUT CURRENT (A)
0
POWER LOSS (W)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
10 20 25
1922 • F09
515 303540
R
S
= 0.025
V
IN
= 48V
V
O
= 3.3V
L
O
= 2.2µH
Figure 9. R
SENSE
Power Loss vs I
OUT
OPTIONAL
FILTERING
N:1
MB
SOURCE
MD
SOURCE
CURRENT
TRANSFORMER
R
SLOPE
RAMP
CS
R
S
1922 F10
Figure 10. Current Transformer Sense Circuitry
OPERATIO
U
LTC1922-1
17
Phase Modulator
The LTC1922-1 phase modulation control circuitry is
comprised of the phase modulation comparator and logic,
the error amplifier, and the soft-start amplifier (see
Figure␣ 11). Together, these elements develop the required
phase overlap (duty cycle) required to keep the output
voltage in regulation. In isolated applications, the sensed
output voltage error signal is fed back to COMP across the
input to output isolation boundary by an optical coupler
and shunt reference/error amplifier (LT
®
1431) combina-
tion. The FB pin is connected to GND, forcing COMP high.
The collector of the optoisolator is connected to COMP
directly. The voltage COMP is internally attenuated by the
LTC1922-1. The attenuated COMP voltage provides one
input to the phase modulation comparator. This is the
current command. The other input to the phase modula-
tion comparator is the RAMP voltage, level shifted by
approximately 400mV. This is the current loop feedback.
During every switching cycle, alternate diagonal switches
(MA-MD or MB-MC) conduct and cause current in an
output inductor to increase. This current is seen on the
primary of the power transformer divided by the turns
ratio. Since the current sense resistor is connected
between GND and the two bottom bridge transistors, a
voltage proportional to the output inductor current will be
seen across R
SENSE
. The high side of R
SENSE
is also
connected to RAMP and CS, usually through a small
resistor (R
SLOPE
). When the voltage on RAMP/CS exceeds
either COMP/5.2 –400mV, or 400mv, the overlap conduc-
tion period will terminate. During normal operation, the
attenuated COMP voltage will determine the RAMP/CS trip
point. During start-up, or slewing conditions following a
large load step, the 400mV CS threshold will terminate the
cycle, as COMP will be driven high, such that the attenu-
ated version exceeds the 400mV threshold. In extreme
conditions, the 600mV threshold on CS will be exceeded,
invoking a soft-start/restart cycle.
400mV
12µA
1922 F11
R
SQ
R
SQ
+
+
+
+
Q
Q
C
B
D
A
CLK
CLK
CLK
1.2V
V
REF
SOFT-START
AMPLIFIER
ERROR
AMPLIFIER
TOGGLE
F/F
PHASE
MODULATION
LOGIC
PHASE
MODULATION
COMPARATOR
FROM
CURRENT
LIMIT
COMPARATOR
BLANKING
FB
COMP
SS
R
LEB
RAMP
14.9k
50k
Figure 11. Phase Modulation Circuitry
OPERATIO
U
LTC1922-1
18
Selecting the Power Stage Components
Perhaps the most critical part of the overall design of the
converter is selecting the power MOSFETs, transformer,
inductors and filter capacitors. Tremendous gains in effi-
ciency, transient performance and overall operation can
be obtained as long as a few simple guidelines are followed
with the phase shifted full-bridge topology.
Power Transformer
This guide is aimed at selecting readily available standard
“off the shelf” transformers. The basic requirements,
however, apply to custom transformer designs as well.
Switching frequency, core material characteristics, series
resistance and input/output voltages all play an important
role in transformer selection. Close attention also needs to
be paid to leakage and magnetizing inductances as they
play an important role in how well the converter will
achieve ZVS. Planar magnetics are very well suited to
these applications because of their excellent control of
these parameters.
Turns Ratio
The required turns ratio for a current doubler secondary is
given below. Depending on the magnetics selected, this
value may need to be reduced slightly.
Turns ratio formula:
N
VD
V
IN MIN MAX
OUT
= 2•
()
where:
V
IN(MIN)
= Minimum V
IN
for operation
D
MAX
= Maximum duty cycle of controller
Magnetizing, Output, and Leakage Inductors
A lower value of magnetizing and output inductance will
improve the ability of the converter to achieve ZVS over the
full range of loads and reduce the size of the external
commutating inductor. One of the trade-offs is increased
primary referred ripple current which has a small negative
impact on efficiency. Other factors to consider are switch-
ing frequency and required maximum duty cycle. A lower
value of magnetizing inductance will require a longer time
to reset the core, cutting into the available duty cycle
range. As switching frequencies increase, this becomes
more significant. In general, the magnetizing inductance
value should be the lowest value required in order to
achieve the necessary maximum duty cycle at the chosen
switching frequency. Output inductor value determines
the magnitude of output ripple current and therefore the
ripple voltage along with the output capacitors. Generally
speaking, the output inductance should be minimized as
much as possible in order to improve transient response.
In addition, output capacitance ESR should be minimized
as much as possible. Using the equations below, plug in
the manufacturers magnetizing inductance value and a
“starting value” of commutating inductance (1% of L
MAG
)
to verify that a sufficient max duty cycle can be achieved
at the desired switching frequency. Next, use equation (2)
to determine what the absolute minimum required L
COM
is
to guarantee ZVT over the entire load range. One or two
iterations may be required in order to arrive at the final
selections.
MAX DC vs L
COM
at f
SW
MAXDC
fT
SW R
2
2
–•
;
(1)
where:
T
R
= transformer reset time (worst case)
=
+
+
IfLVDN
fL N
LL
V
O MAX SW MAG IN
SW MAG
COM L
IN
()
••
••
2
L
COM
vs ZVS vs Load
LL
CL f
D
COM L
OSS MAG SW
+=
43
2
22
2
/•
(2)
OPERATIO
U

LTC1922IN-1#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Sync PhModulated Full-Bridge Cntr
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union