MT9122AP1 Datasheet MT9122AP1 | P7-P9

MT9122 Data Sheet

Zarlink Semiconductor Inc.

Controllerless Mode

In G.165 standard, the echo return loss is expected to be at least 6 dB. This implies that the Double-Talk Detector

Threshold (DTDT) should be set to 0.5 (-6 dB). However, in order to get additional guardband, the DTDT is set

internally to 0.5625 (-5 dB). In controllerless mode, the Double-Talk Detector is always active.

Controller Mode

In some applications the return loss can be higher or lower than 6 dB. The MT9122 allows the user to change the

detection threshold to suit each application’s need. This threshold can be set by writing the desired threshold value

into the DTDT register.

The DTDT register is 16 bits wide. The register value in hexadecimal can be calculated with the following equation:

DTDT

(hex)

= hex(DTDT

(dec)

* 32768)

where 0 < DTDT

(dec)

< 1

Example: For DTDT = 0.5625 (-5dB), the

hexadecimal value becomes

hex(0.5625 * 32768) = 4800h

Non-Linear Processor (NLP)

After echo cancellation, there is always a small amount of residual echo which may still be audible. The MT9122

uses an NLP to remove residual echo signals which have a level lower than the Adaptive Suppression Threshold

(TSUP in G.165). This threshold depends upon the level of the Rin (Lrin) reference signal as well as the

programmed value of the Non-Linear Processor Threshold register (NLPTHR). TSUP can be calculated by the

following equation:

TSUP = Lrin + 20log

(NLPTHR)

where NLPTHR is the Non-Linear Processor Threshold register value and Lrin is the relative power level expressed

in dBm0.

When the level of residual error signal falls below TSUP, the NLP is activated further attenuating the residual signal

to less than -65 dBm0. To prevent a perceived decrease in background noise due to the activation of the NLP, a

spectrally-shaped comfort noise, equivalent in power level to the background noise, is injected. This keeps the

perceived noise level constant. Consequently, the user does not hear the activation and de-activation of the NLP.

Controllerless Mode

The NLP processor can be disabled by connecting the NLP pin to Vss.

Controller Mode

The NLP processor can be disabled by setting the NLPDis bit to 1 in Control Register 2.

The NLPTHR register is 16 bits wide. The register value in hexadecimal can be calculated with the following

equation:

NLPTHR

(hex)

= hex(NLPTHR

(dec)

* 32768)

MT9122 Data Sheet

Zarlink Semiconductor Inc.

where 0 < NLPTHR

(dec)

< 1

The comfort noise injection can be disabled by setting the INJDis bit to 1 in Control Register 1.

It should be noted that the NLPTHR is valid and the comfort noise injection is active only when the NLP is enabled.

Disable Tone Detector

G.165 recommendation defines the disable tone as having the following characteristics: 2100 Hz (± 21 Hz)

sinewave, a power level between -6 to -31 dBm0, and a phase reversal of 180 degrees (± 25 degrees) every

450 ms (± 24 ms). If the disable tone is present for a minimum of one second with at least one phase reversal, the

Tone Detector will trigger.

G.164 recommendation defines the disable tone as a 2100 Hz (±21Hz) sinewave with a power level between -6 to -

31 dBm0. If the disable tone is present for a minimum of one second, with or without phase reversal, the Tone

Detector will trigger.

The MT9122 has four Tone Detectors in order to monitor the occurrence of a valid disable tone on channels A and

B on both Rin and Sin. Upon detection of a disable tone, output pins TD1

or TD2 will go low as illustrated in Figure

Figure 4 - Disable Tone Detection

Once a Tone Detector has been triggered, the MT9122 no longer needs a valid disable tone (G.164 or G.165) to

maintain Tone Detector status (e.g. TD1

, TD2 pins low). The Tone Detector status will only release (e.g. TD1, TD2

pins high) if the signals Rin and Sin fall below -30 dBm0, in the frequency range of 390 Hz to 700 Hz, and below -

34 dBm0, in the frequency range of 700 Hz to 3400 Hz, for at least 400 ms.

Controllerless Mode

The selection between G.165 and G.164 tone disable is controlled by the REV pin. When the REV pin is connected

to Vss, G.164 is selected. This applies to all four Tone Detectors.

In response to a valid disable tone, the MT9122 must be switched from the Enable Adaptation state to the Bypass

state. In an application, the Tone Detect outputs, TD1

and TD2, may be used to switch the echo cancellers between

these two states. This is achieved by connecting S1 and S3 pins to Vdd and by connecting the TD1

and TD2

outputs to the S2 and S4 input pins respectively.

Controller Mode

The selection between G.165 and G.164 tone disable is controlled by the PHDis bit in Control Register 2. When the

PHDis bit is set to 1, G.164 tone disable requirements are selected. This applies to all four Tone Detectors.

TD1

Rin

Sin

Echo Canceller A

Tone Detector

Echo Canceller B

TD2

Rin

Sin

Tone Detector

MT9122 Data Sheet

Zarlink Semiconductor Inc.

In response to a valid disable tone, the MT9122 must be switched from the Enable Adaptation state to the Bypass

state. This can be done in two ways, automatically or externally. In automatic mode, the Tone Detectors internally

control the switching between Enable Adaptation and Bypass states. The automatic mode can be activated by

setting the AutoTD bit in Control Register 2 to high. In external mode, an external controller is needed to poll the TD

bit in Status Register A or B. Following the detection of a disable tone (TD bit high), the external controller should

switch the echo canceller from Enable Adaptation to Bypass state.

The TD1

and TD2 output pins remain active, as in Controllerless mode, and they can be used as an interrupt to an

external controller.

Narrow Band Signal Detector (NBSD)

Single or dual frequency tones (e.g. DTMF tones) present in the reference input (Rin) of the echo canceller for a

prolonged period of time may cause the adaptive filter to diverge. The Narrow Band Signal Detector (NBSD) is

designed to prevent this divergence by detecting single or dual tones of arbitrary frequency, phase, and amplitude.

When narrow band signals are detected, the adaptation process is halted but the echo canceller continues to

cancel echo.

Controllerless Mode

The NBSD is always active and automatically disables the filter adaptation process when narrow band signals are

detected.

Controller Mode

The NBSD can be disabled by setting the NBDis bit to 1 in Control Register 2.

Offset Null Filter

Adaptive filters in general do not operate properly when a DC offset is present on either the reference signal (Rin)

or the echo composite signal (Sin). To remove the DC component, the MT9122 incorporates Offset Null filters in

both Rin and Sin inputs.

Controllerless Mode

The Offset Null filters are always active.

Controller Mode

The offset null filters can be disabled by setting the HPFDis bit to 1 in Control Register 2.

Echo Canceller Functional States

Each echo canceller has four functional states: Mute, Bypass, Disable Adaptation and Enable Adaptation.

Mute

The Mute state forces the echo canceller to transmit quiet code and halts the filter adaptation process.

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MT9122AP1

Mfr. #:

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Telecom Interface ICs Pb Free DUAL VOICE ECHO CANCELLER W/TD

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MT9122AP1