DS636F2 Copyright 2010 Cirrus Logic (All Rights Reserved) 29
EP9301
Entry Level ARM9 System-on-Chip Processor
Audio Interface
Note: The tspix_clk is programmable by the user.
Texas Instruments’ Synchronous Serial Format
Microwire
The following table contains the values for the timings of each of the SPI modes.
Parameter Symbol Min Typ Max Unit
SCLK cycle time
t
clk_per
- tspix_clk - ns
SCLK high time
t
clk_high
- (tspix_clk) / 2 - ns
SCLK low time
t
clk_low
- (tspix_clk) / 2 - ns
SCLK rise/fall time
t
clkrf
1-8ns
Data from master valid delay time
t
DMd
--3ns
Data from master setup time
t
DMs
20 - - ns
Data from master hold time
t
DMh
40 - - ns
Data from slave setup time
t
DSs
20 - - ns
Data from slave hold time
t
DSh
40 - - ns
Figure 16. TI Single Transfer Timing Measurement
Figure 17. Microwire Frame Format, Single Transfer
SCLK
SFRM
SSPTXD/
SSPRXD
4 to 16 bits
MSB LSB
t
clk_per
t
clk_low
t
clk_high
t
clkrf
SCLK
SFRM
SSPTXD
SSPRXD
0
MSB LSB
4 to 16 bits output data
t
clkrf
t
clk_high
t
clk_low
t
clk_per
MSB
LSB
8-bit control
