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P89LPC9241FDH,112

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P72P73-P75
P89LPC92X1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2.1 — 27 August 2012 61 of 75
NXP Semiconductors
P89LPC9201/9211/922A1/9241/9251
8-bit microcontroller with 8-bit ADC
10.3 BOD characteristics
[1] Typical ratings are not guaranteed. The values listed are at room temperature, 3 V.
Table 13. BOD static characteristics
V
DD
= 2.4 V to 3.6 V unless otherwise specified.
T
amb
=
40
Cto+85
C for industrial applications, unless otherwise specified.
Symbol Parameter Conditions Min Typ
[1]
Max Unit
BOD interrupt
V
trip
trip voltage falling stage
BOICFG1, BOICFG0 = 01 2.25 - 2.55 V
BOICFG1, BOICFG0 = 10 2.60 - 2.80 V
BOICFG1, BOICFG0 = 11 3.10 - 3.40 V
rising stage
BOICFG1, BOICFG0 = 01 2.30 - 2.60 V
BOICFG1, BOICFG0 = 10 2.70 - 2.90 V
BOICFG1, BOICFG0 = 11 3.15 - 3.45 V
BOD reset
V
trip
trip voltage falling stage
BOE1, BOE0 = 01 2.10 - 2.30 V
BOE1, BOE0 = 10 2.25 - 2.55 V
BOE1, BOE0 = 11 2.80 - 3.20 V
rising stage
BOE1, BOE0 = 01 2.20 - 2.40 V
BOE1, BOE0 = 10 2.30 - 2.60 V
BOE1, BOE0 = 11 2.90 - 3.30 V
BOD EEPROM/FLASH
V
trip
trip voltage falling stage 2.25 - 2.55 V
rising stage 2.30 - 2.60 V
Fig 31. BOD interrupt/reset characteristics
V
DD
V
trip
002aae352
(BOF/BOIF
set by hardware)
(BOF/BOIF can be
cleared in software)
BOF/BOIF
P89LPC92X1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2.1 — 27 August 2012 62 of 75
NXP Semiconductors
P89LPC9201/9211/922A1/9241/9251
8-bit microcontroller with 8-bit ADC
11. Dynamic characteristics
[1] Parameters are valid over operating temperature range unless otherwise specified.
[2] Parts are tested to 2 MHz, but are guaranteed to operate down to 0 Hz.
Table 14. Dynamic characteristics (12 MHz)
V
DD
= 2.4 V to 3.6 V unless otherwise specified.
T
amb
=
40
Cto+85
C for industrial applications, unless otherwise specified.
[1][2]
Symbol Parameter Conditions Variable clock f
osc
=12MHz Unit
Min Max Min Max
f
osc(RC)
internal RC oscillator
frequency
nominal f = 7.3728 MHz
trimmed to 1% at
T
amb
=25 C; clock
doubler option = OFF
(default)
7.189 7.557 7.189 7.557 MHz
nominal f = 14.7456 MHz;
clock doubler option = ON,
V
DD
= 2.7 V to 3.6 V
14.378 15.114 14.378 15.114 MHz
f
osc(WD)
internal watchdog
oscillator frequency
T
amb
=25 C 380 420 380 420 kHz
f
osc
oscillator frequency 0 12 - - MHz
T
cy(clk)
clock cycle time see Figure 33 83 - - - ns
f
CLKLP
low-power select clock
frequency
08--MHz
Glitch filter
t
gr
glitch rejection time P1.5/RST pin - 50 - 50 ns
any pin except P1.5/RST
- 15 - 15 ns
t
sa
signal acceptance time P1.5/RST pin 125 - 125 - ns
any pin except P1.5/RST
50 - 50 - ns
External clock
t
CHCX
clock HIGH time see Figure 33 33 T
cy(clk)
t
CLCX
33 - ns
t
CLCX
clock LOW time see Figure 33 33 T
cy(clk)
t
CHCX
33 - ns
t
CLCH
clock rise time see Figure 33 -8-8ns
t
CHCL
clock fall time see Figure 33 -8-8ns
Shift register (UART mode 0)
T
XLXL
serial port clock cycle
time
see Figure 32 16T
cy(clk)
- 1333 - ns
t
QVXH
output data set-up to
clock rising edge time
see Figure 32 13T
cy(clk)
- 1083 - ns
t
XHQX
output data hold after
clock rising edge time
see Figure 32 -T
cy(clk)
+ 20 - 103 ns
t
XHDX
input data hold after
clock rising edge time
see Figure 32 -0-0ns
t
XHDV
input data valid to clock
rising edge time
see Figure 32 150 - 150 - ns
P89LPC92X1 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2.1 — 27 August 2012 63 of 75
NXP Semiconductors
P89LPC9201/9211/922A1/9241/9251
8-bit microcontroller with 8-bit ADC
[1] Parameters are valid over operating temperature range unless otherwise specified.
[2] Parts are tested to 2 MHz, but are guaranteed to operate down to 0 Hz.
Table 15. Dynamic characteristics (18 MHz)
V
DD
= 3.0 V to 3.6 V unless otherwise specified.
T
amb
=
40
Cto+85
C for industrial applications, unless otherwise specified.
[1][2]
Symbol Parameter Conditions Variable clock f
osc
=18MHz Unit
Min Max Min Max
f
osc(RC)
internal RC oscillator
frequency
nominal f = 7.3728 MHz
trimmed to 1% at
T
amb
=25 C; clock
doubler option = OFF
(default)
7.189 7.557 7.189 7.557 MHz
nominal f = 14.7456 MHz;
clock doubler option = ON
14.378 15.114 14.378 15.114 MHz
f
osc(WD)
internal watchdog
oscillator frequency
T
amb
=25 C 380 420 380 420 kHz
f
osc
oscillator frequency 0 18 - - MHz
T
cy(clk)
clock cycle time see Figure 33 55 - - - ns
f
CLKLP
low-power select clock
frequency
08--MHz
Glitch filter
t
gr
glitch rejection time P1.5/RST pin - 50 - 50 ns
any pin except P1.5/RST
- 15 - 15 ns
t
sa
signal acceptance time P1.5/RST pin 125 - 125 - ns
any pin except P1.5/RST
50 - 50 - ns
External clock
t
CHCX
clock HIGH time see Figure 33 22 T
cy(clk)
t
CLCX
22 - ns
t
CLCX
clock LOW time see Figure 33 22 T
cy(clk)
t
CHCX
22 - ns
t
CLCH
clock rise time see Figure 33 -5-5ns
t
CHCL
clock fall time see Figure 33 -5-5ns
Shift register (UART mode 0)
T
XLXL
serial port clock cycle
time
see Figure 32 16T
cy(clk)
- 888 - ns
t
QVXH
output data set-up to
clock rising edge time
see Figure 32 13T
cy(clk)
- 722 - ns
t
XHQX
output data hold after
clock rising edge time
see Figure 32 -T
cy(clk)
+ 20 - 75 ns
t
XHDX
input data hold after
clock rising edge time
see Figure 32 -0-0ns
t
XHDV
input data valid to clock
rising edge time
see Figure 32 150 - 150 - ns
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57P58-P60P61-P63P64-P66P67-P69P70-P72P73-P75

P89LPC9241FDH,112

Mfr. #:
Buy P89LPC9241FDH,112
Manufacturer:
NXP Semiconductors
Description:
Microcontrollers - MCU 8-bit Microcontrollers - MCU MCU 8-Bit CISC 4KB Flash2.5V/3.3V 20Pin
Lifecycle:
New from this manufacturer.
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