FUSB302B
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19
Table 16. REGISTER DEFINITIONS (Notes 8 and 9)
Address Bit 0Bit 1Bit 2Bit 3Bit 4Bit 5Bit 6Bit 7
Reg
Value
Type
Register
Name
0x0A Mask1 R/W 0 M_
VBUSOK
M_
ACTIVITY
M_COMP_
CHNG
M_CRC_C
HK
M_ALERT M_WAKE M_
COLLISION
M_BC_LVL
0x0B Power R/W 1 PWR3 PWR2 PWR1 PWR0
0x0C Reset W/C 0 PD_
RESET
SW_RES
0x0D OCPreg R/W 0F OCP_
RANGE
OCP_
CUR2
OCP_
CUR1
OCP_
CUR0
0x0E Maska R/W 0 M_OCP_
TEMP
M_
TOGDONE
M_SOFT
FAIL
M_RETRY
FAIL
M_HARD
SENT
M_
TXSENT
M_
SOFTRST
M_
HARDRST
0x0F Maskb R/W 0 M_
GCRCSEN
T
0x10 Control4 R/W 0 TOG_
EXIT_AUD
0x3C Status0a R 0 SOFTFAIL RETRY
FAIL
POWER3 POWER2 SOFTRST HARDRST
0x3D Status1a R 0 TOGSS3 TOGSS2 TOGSS1 RXSOP
2DB
RXSOP
1DB
RXSOP
0x3E Interrupta R/C 0 I_OCP_
TEMP
I_
TOGDONE
I_
SOFTFAIL
I_RETRY
FAIL
I_HARD
SENT
I_TXSENT I_SOFT
RST
I_HARD
RST
0x3F Interruptb R/C 0 I_GCRCS
ENT
0x40 Status0 R 0 VBUSOK ACTIVITY COMP CRC_CHK ALERT WAKE BC_LVL1 BC_LVL0
0x41 Status1 R 28 RXSOP2 RXSOP1 RX_
EMPTY
RX_FULL TX_
EMPTY
TX_FULL OVRTEMP OCP
0x42 Interrupt R/C 0 I_VBUSOK I_
ACTIVITY
I_COMP_
CHNG
I_CRC_
CHK
I_ALERT I_WAKE I_
COLLISION
I_BC_LVL
0x43 FIFOs R/W
(Note
10)
0 Write to TX FIFO or read from RX FIFO repeatedly without address auto increment
Type C Bits USB PD Bits General Bits
8. Do not use registers that are blank.
9. Values read from undefined register bits are not defined and invalid. Do not write to undefined registers.
10.FIFO register is serially read/written without auto address increment.
11. Automotive Part Only; FUSB302BVMPX
Table 17. DEVICE ID
(Address: 01h; Reset Value: 0x1001_XXXX; Type: Read)
Bit # Name R/W/C Size (Bits) Description
7:4 Version ID R 4 Device version ID by Trim or etc.
A_[Revision ID]: 1000 (e.g. A_revA)
B_[Revision ID]: 1001
C_[Revision ID]: 1010 etc
3:2 Product ID R 2
“01”, “10” and “11” applies to MLP only:
00: FUSB302BMPX/FUSB302BVMPX(Default) & FUSB302BUCX
01: FUSB302B01MPX
10: FUSB302B10MPX
11: FUSB302B11MPX
1:0 Revision ID R 2
Revision History of each version
[Version ID]_revA: 00(e.g. revA)
[Version ID]_revB: 01 (e.g. revB)
[Version ID]_revC: 10 (e.g. revC)
[Version ID]_revC: 11 (e.g. revD)
FUSB302B
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Table 18. SWITCHES0
(Address: 02h; Reset Value: 0x0000_0011; Type: Read/Write)
Bit #
Name R/W/C Size (Bits) Description
7 PU_EN2 R/W 1 1: Apply host pull up current to CC2 pin
6 PU_EN1 R/W 1 1: Apply host pull up current to CC1 pin
5 VCONN_CC2 R/W 1 1: Turn on the VCONN current to CC2 pin
4 VCONN_CC1 R/W 1 1: Turn on the VCONN current to CC1 pin
3 MEAS_CC2 R/W 1 1: Use the measure block to monitor or measure the voltage on
CC2
2 MEAS_CC1 R/W 1 1: Use the measure block to monitor or measure the voltage on
CC1
1 PDWN2 R/W 1 1: Device pull down on CC2. 0: no pull down
0 PDWN1 R/W 1 1: Device pull down on CC1. 0: no pull down
Table 19. SWITCHES1
(Address: 03h; Reset Value: 0x0010_0000; Type: Read/Write)
Bit # Name R/W/C Size (Bits) Description
7 POWERROLE R/W 1 Bit used for constructing the GoodCRC acknowledge packet. This
bit corresponds to the Port Power Role bit in the message header if
an SOP packet is received:
1: Source if SOP
0: Sink if SOP
6:5 SPECREV1:
SPECREV0
R/W 2 Bit used for constructing the GoodCRC acknowledge packet.
These bits correspond to the Specification Revision bits in the
message header:
00: Revision 1.0
01: Revision 2.0
10: Do Not Use
11: Do Not Use
4 DATAROLE R/W 1 Bit used for constructing the GoodCRC acknowledge packet. This
bit corresponds to the Port Data Role bit in the message header.
For SOP:
1: SRC
0: SNK
3 Reserved N/A 1 Do Not Use
2 AUTO_CRC R/W 1 1: Starts the transmitter automatically when a message with a
good CRC is received and automatically sends a GoodCRC
acknowledge packet back to the relevant SOP*
0: Feature disabled
1 TXCC2 R/W 1 1: Enable BMC transmit driver on CC2 pin
0 TXCC1 R/W 1 1: Enable BMC transmit driver on CC1 pin
FUSB302B
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21
Table 20. MEASURE
(Address: 04h; ·Reset Value: 0x0011_0001; Type: Read/Write)
Bit #
Name R/W/C Size (Bits) Description
7 Reserved N/A 1 Do Not Use
6 MEAS_VBUS R/W 1 0: MDAC/comparator measurement is controlled by MEAS_CC*
bits
1: Measure VBUS with the MDAC/comparator. This requires
MEAS_CC* bits to be 0
5:0 MDAC[5:0] R/W 6 Measure Block DAC data input. LSB is equivalent to 42 mV of
voltage which is compared to the measured CC voltage.
The measured CC is selected by MEAS_CC2, or MEAS_CC1 bits.
MDAC[5:0] MEAS_VBUS = 0 MEAS_VBUS = 1 Unit
00_0000 0.042 0.420 V
00_0001 0.084 0.840 V
11_0000 2.058 20.58 V
11_0011 2.184 21.84 V
11_1110 2.646 26.46 V
11_1111 > 2.688 26.88 V
Table 21. SLICE
(Address: 05h; Reset Value: 0x0110_0000; Type: Read/Write)
Bit #
Name R/W/C Size (Bits) Description
7:6 SDAC_HYS[1:0] R/W 2 Adds hysteresis where there are now two thresholds, the lower
threshold which is always the value programmed by SDAC[5:0]
and the higher threshold that is:
11: 255 mV hysteresis: higher threshold = (SDAC value + 20hex)
10: 170 mV hysteresis: higher threshold = (SDAC value + Ahex)
01: 85 mV hysteresis: higher threshold = (SDAC value + 5)
00: No hysteresis: higher threshold = SDAC value
5:0 SDAC[5:0] R/W 6 BMC Slicer DAC data input. Allows for a programmable threshold
so as to meet the BMC receive mask under all noise conditions.
Table 22. CONTROL0
(Address: 06h; Reset Value: 0x0010_0100; Type: (see column below))
Bit # Name R/W/C Size (Bits) Description
7 Reserved N/A 1 Do Not Use
6 TX_FLUSH W/C 1 1: Self clearing bit to flush the content of the transmit FIFO
5 INT_MASK R/W 1 1: Mask all interrupts
0: Interrupts to host are enabled
4 Reserved N/A 1 Do Not Use
3:2 HOST_CUR[1:0] R/W 2 1: Controls the host pull up current enabled by PU_EN[2:1]:
00: No current
01: 80 mA – Default USB power
10: 180 mA – Medium Current Mode: 1.5 A
11: 330 mA – High Current Mode: 3 A
1 AUTO_PRE R/W 1 1: Starts the transmitter automatically when a message with
a good CRC is received. This allows the software to take as
much as 300 mS to respond after the I_CRC_CHK interrupt is
received. Before starting the transmitter, an internal timer
waits for approximately 170 mS before executing the transmit
start and preamble
0: Feature disabled
0 TX_START W/C 1 1: Start transmitter using the data in the transmit FIFO. Preamble
is started first. During the preamble period the transmit data
can start to be written to the transmit FIFO. Self clearing.

FUSB302BUCX

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
IC USB TYPE C CTLR PROGR 9WLCSP
Lifecycle:
New from this manufacturer.
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