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NCP81080DR2G

P1-P3P4-P6P7-P9P10-P12
© Semiconductor Components Industries, LLC, 2017
October, 2017 − Rev. 1
1 Publication Order Number:
NCP81080/D
NCP81080
High Performance Dual
MOSFET Gate Driver
The NCP81080 is a high performance dual MOSFET gate driver
optimized to drive half bridge N−Channel MOSFETs. The NCP81080
uses a bootstrap technique to ensure a proper drive of the high−side
power switch. A high floating top driver design can accommodate HB
voltage as high as 180 V. The NCP81080 has an internal anti−cross
conduction circuit with a 135 ns fixed internal dead−time to prevent
current shoot−through. The NCP81080 is available in 2x2mm DFN
and SOIC packages.
Features
• Drives Two N−Channel MOSFETs in High−Side and Low−Side
Configuration
• Floating Top Driver Accommodates Boost Voltage up to 180 V
• Switching Frequency up to 500 Khz
• Current Shoot−Through Protection
• 135 ns Fixed internal Dead−Time
• 44 ns Rising and 30 ns Falling Propagation Delay Times
• 0.5 A peak Source Current with 0.8 A Peak Sink Current
• 19 ns Rise/17 ns Fall Times with 1000−pF Load
• High−Side & Low−Side UVLO Protection
Applications
• Telecom and Datacom
• Isolated Non−Isolated Power Supply Architectures
• Class−D Audio Amplifiers
• Two Switch and Active Clamp Forward Converters
• Motor Drives
Figure 1. Typical Application Circuit
VSS
12 V
HI
LI
VDD
HB
HO
HS
LO
VIN
VOUT
NCP81080
PWM
CONTROLLER
DFN8
MN SUFFIX
CASE 506AA
MARKING
DIAGRAMS
CWMG
G
1
1
NCP81080
ALYWG
G
1
8
SOIC−8
CASE 751
1
8
NCP81080 = Specific Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
www.onsemi.com
CW = Specific Device Code
M = Date Code
G = Pb−Free Device
(Note: Microdot may be in either location)
Device Package Shipping
ORDERING INFORMATION
†
NCP81080MNTBG DFN8
(Pb−Free)
3000 / Tape &
Reel
NCP81080DR2G SOIC8
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
(Note: Microdot may be in either location)
2500 / Tape &
Reel
NCP81080
www.onsemi.com
2
Table 1. PIN DESCRIPTION TABLE
Pin No. Symbol Description
1 VDD
Positive supply for the low−
side driver
2 HI High−Side Input
3 LI Low−Side Input
4 VSS Negative Supply Return
5 LO Low−Side Output
6 HS High−Side Source
7 HO High−Side Output
8 HB High−Side Bootstrap
9 EPAD Connect EPAD to VSS
EPAD
HB
HO
HS
LO
8
7
6
5
1
2
3
4
VDD
HI
LI
VSS
(Top View)
Table 2. MAXIMUM RATINGS
Parameter Value Unit
VDD −0.3 to 24 V
V
HB
– V
SS
−0.3 to 200 V
V
HO
– V
HS
DC −0.3 to V
HB
+ 0.3
V
Repetitive Pulse < 100 ns −2 to V
HB
+ 0.3, (V
HB
− V
HS
<20)
V
HS
− V
SS
DC −20 to 200 − VDD V
V
LO
− V
SS
DC −0.3 to VDD + 0.3
V
Repetitive pulse < 100 ns −2 to VDD + 0.3
V
HI
, V
LI
−10 to 24 V
V
HB
−
V
HS
−0.3 to 24 V
I
Diode
AC (Peak current) 8 A
Operating virtual Junction Temp Range, T
J
−40 to 170 °C
Storage Temperature, T
STG
−65 to 150 °C
Lead Temperature (Soldering, 10 sec) +300 °C
HBM 800 V
CDM 2000 V
Table 3. RECOMMENDED OPERATING CONDITIONS
Parameter Min Nom Max Unit
V
DD
Supply Voltage Range 5.5 12 20
V
V
HS
Voltage on HS (DC) −10 180
V
HB
Voltage on HB V
HS
+ 5.5 V
HS
+ 20
Voltage Slew Rate on HS 30 V / ns
T
J
Operating Junction Temperature Range −40 +140 °C
NCP81080
www.onsemi.com
3
Table 4. ABSOLUTE MAXIMUM RATINGS
Thermal Characteristic DFN SOIC Unit
q
JA
Junction to Ambient thermal resistance
97 146
°C/W
q
JCT
Junction to case (Top) thermal resistance
181 72
q
JCB
Junction to case (Bottom) thermal resistance
1.9 67
y
JT
Junction to top characterization parameter
2.2 7.2
y
JB
Junction to board characterization parameter
2.0 64
Moisture Sensitivity Level − QFN Package MSL 1
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
*The maximum package power dissipation must be observed.
2) JESD 51−5 (1S2P Direct−Attach Method) with 0 LFM
3) JESD 51−7 (1S2P Direct−Attach Method) with 0 LFM
*All signals referenced to VSS unless otherwise noted.
Table 5. ELECTRICAL CHARACTERISTICS
Unless otherwise stated: T
A
= T
J
= −40°C to 140°C; VDD = VHB = 12 V, VHS = VSS = 0 V, No load on LO or HO
Parameter
Test Condition Min Typ Max Units
SUPPLY CURRENTS
I
DD
VDD quiescent current V
LI
= V
HI
= 0 0.85 1.6
mA
I
DDO
VDD operating current
f = 500 kHz, C
LOAD
= 0 5.1 9.0
f = 300 kHz, C
LOAD
= 0 3.5 6.5
I
HB
Boot voltage quiescent current V
LI
= V
HI
= 0 V 0.65 1.6
I
HBO
Boot voltage operating current
f = 500 kHz, C
LOAD
= 0 4.8 9.0
f = 300 kHz, C
LOAD
= 0 3.4 6.5
I
HBS
HB to VSS quiescent current V
HS
= V
HB
= 110 V 8.0 100
mA
I
HBSO
HB to VSS operating current f = 500 kHz, C
LOAD
= 0 0.2 mA
INPUT
V
HIH,
V
LIH
Input voltage high 2.0
V
V
HIL,
V
LIL
Input voltage low 0.8
R
IN
Input Pulldown Resistance 100 175 350
kW
UNDERVOLTAGE PROTECTION (UVLO)
VDD
VDD rising threshold 3.4 4.4 5.4
V
VDD VDD Threshold hysteresis 0.4
VHB VHB rising threshold 3.4 4.4 5.4
VHB VHB Threshold hysteresis 0.35
BOOTSTRAP DIODE
V
F
Low−current forward voltage
I
VDD
− HB = 100 mA
0.61 0.85
V
V
FI
High−current forward voltage I
VDD
− HB = 100 mA 0.93 1.1
R
D
Dynamic resistance, DVF/DI
I
VDD
− HB = 100 mA and 80 mA 2.1 3.5
W
LO GATE DRIVER
V
LOL
Low level output voltage I
LO
= 100 mA 0.31 1.2
V
V
LOH
High level output voltage I
LO
= −100 mA, V
LOH
= V
DD
−V
LO
0.75 1.6
Peak Pull−Up Current V
LO
= 0 V 0.55
A
Peak Pull−Down Current V
LO
= 12 V 0.8
R
O,
Unbiased
VCC = VSS 20k
W
P1-P3P4-P6P7-P9P10-P12

NCP81080DR2G

Mfr. #:
Buy NCP81080DR2G
Manufacturer:
ON Semiconductor
Description:
Gate Drivers LOW-COST HIGH VLTG GATE DRIVER
Lifecycle:
New from this manufacturer.
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