MAX8537/MAX8538/MAX8539
Dual-Synchronous Buck Controllers for Point-of-
Load, Tracking, and DDR Memory Power Supplies
______________________________________________________________________________________ 17
of the inductor ripple current (see the Inductor
Selection section). If R
DS(ON)
of the high-side MOSFET
is used for current sensing, make sure to use the maxi-
mum R
DS(ON)
at the highest operating junction temper-
ature to avoid fault tripping of the current limit at
elevated temperature. Consideration should also be
given to the tolerance of the 200µA current sink.
When R
DS(ON)
of the high-side MOSFET is used for cur-
rent sensing, ringing on the LX voltage waveform can
interfere with the current limit. Below is the procedure for
selecting the value of the series RC snubber circuit:
1) Connect a scope probe to measure V
LX
to GND,
and observe the ringing frequency, f
R
.
2) Find the capacitor value (connected from LX to
GND) that reduces the ringing frequency by half.
The circuit parasitic capacitance (C
PAR
) at LX is
then equal to 1/3rd the value of the added capaci-
tance above. The circuit parasitic inductance (L
PAR
)
is calculated by:
The resistor for critical dampening (R
SNUB
) is equal to 2π
x f
R
x L
PAR
. Adjust the resistor value up or down to tailor
the desired damping and the peak voltage excursion.
The capacitor (C
SNUB
) should be at least 2 to 4 times
the value of the C
PAR
in order to be effective. The
power loss of the snubber circuit is dissipated in the
resistor (P
RSNUB
) and can be calculated as:
where V
IN
is the input voltage and f
SW
is the switching
frequency. Choose an R
SNUB
power rating that meets
the specific application’s derating rule for the power
dissipation calculated.
Additionally, there is parasitic inductance of the cur-
rent-sensing element, whether the high-side MOSFET
R
DS(ON)
(L
SENSE_FET
) or the actual current-sense
resistor R
SENSE
(L
RSENSE
) are used, which is in series
with the output filter inductor. This parasitic inductance,
together with the output inductor, form an inductive
divider and cause error in the current-sensing voltage.
To compensate for this error, a series RC circuit can be
added in parallel with the sensing element (see Figure
1). The RC time constant should equal L
RSENSE
/
R
SENSE
, or L
SENSE_FET
/ R
DS(ON)
. First, set the value of
R equal to or less than R
ILIM_
/ 100. Then, the value of
C can be calculated as:
C = L
RSENSE
/ (R
SENSE
x R) or
C = L
SENSE_FET
/ (R
DS(ON)
x R)
Any PC board trace inductance in series with the sens-
ing element and output inductor should be added to
the specified FET or resistor inductance per the
respective manufacturer’s data sheet. For the case of
the MOSFET, it is the inductance from the drain to the
source lead.
An additional switching noise filter may be needed at
ILIM_ by connecting a capacitor in parallel with R
ILIM_
(in the case of R
DS(ON)
sensing) or from ILIM_ to LX (in
the case of resistor sensing). For the case of R
DS(ON)
sensing, the value of the capacitor should be:
C > 50 / (3.1412 x f
S
x R
ILIM_
)
For the case of resistor sensing:
C < 25 x 10
-9
/ R
ILIM_
Soft-Start Capacitor Setting
The two step-down converters have independent,
adjustable soft-start. External capacitors from SS1/SS2
to ground are charged by an internal 5µA current
source to the corresponding feedback threshold.
Therefore, the soft-start time can be calculated as:
T
SS
= C
SS
x V
FB
/ 5µA
For example, 0.01µF from SS1 to ground corresponds
to approximately a 1.6ms soft-start period for step-
down 1.
Compensation Design
The MAX8537/MAX8538/MAX8539 use a voltage-mode
control scheme that regulates the output voltage by
comparing the error-amplifier output (COMP) with a
fixed internal ramp to produce the required duty cycle.
The error amplifier is an operational amplifier with
25MHz bandwidth to provide fast response. The output
lowpass LC filter creates a double pole at the resonant
frequency that introduces a gain drop of 40dB per
decade and a phase shift of 180 degrees per decade.
The error amplifier must compensate for this gain drop
and phase shift to achieve a stable high-bandwidth
closed-loop system.
The basic regulator loop can be thought of as consist-
ing of a power modulator and an error amplifier. The
power modulator has DC gain set by V
IN
/ V
RAMP
, with
a double pole, f
P_LC
, and a single zero, f
Z_ESR
, set by
the output inductor (L), the output capacitor (C
O
), and
its equivalent series resistance (R
ESR
). Below are the
equations that define the power modulator: