PCA9673 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 29 September 2011 10 of 33
NXP Semiconductors
PCA9673
Remote 16-bit I/O expander for Fm+ I
2
C-bus with interrupt and reset
Fig 11. PCA9673 ID
If more than 2 bytes are read, the slave device loops back to the first byte (manufacturer byte) and
keeps sending data until the master generates a ‘no acknowledge’.
Fig 12. Device ID field reading
0
002aac333
0 0revision
0
0 1 0 0 0 1 00part identification
0
0 0 0 0 0 0 0
0 0 0 0
manufacturer
category identification feature identification
002aac334
1 1 1 1 0 0 0 AS 1
device ID address
START condition R/W
acknowledge from one
or several slave(s)
A5 A4 A3 A2 A1 A0 XA6 A 1 1 1 1 0 0 11
device ID address
A
I
2
C-bus slave address of
the device to be identified
don't care
acknowledge from
slave to be identified
acknowledge from
slave to be identified
R/W
M6 M5 M4M7 M2 M1 M0M3 A
acknowledge
from master
C5 C4 C3C6 C1 C0 F5C2 A
acknowledge
from master
manufacturer name
= 00000000
P3 P2 P1F4 P0 R2 R1 R0
revision = 000
feature identification
= 000100
A P
STOP
condition
no acknowledge
from master
category identification
= 0000001
PCA9673 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 29 September 2011 11 of 33
NXP Semiconductors
PCA9673
Remote 16-bit I/O expander for Fm+ I
2
C-bus with interrupt and reset
8. I/O programming
8.1 Quasi-bidirectional I/O architecture
The PCA9673’s 16 ports (see Figure 2) are entirely independent and can be used either
as input or output ports. Input data is transferred from the ports to the microcontroller in
the Read mode (see Figure 15
). Output data is transmitted to the ports in the Write mode
(see Figure 14
).
Every data transmission from the PCA9673 must consist of an even number of bytes, the
first byte will be referred to as P07 to P00, and the second byte as P17 to P10. The third
will be referred to as P07 to P00, and so on.
This quasi-bidirectional I/O can be used as an input or output without the use of a control
signal for data directions. At power-on the I/Os are HIGH. In this mode only a current
source (I
OH
) to V
DD
is active. An additional strong pull-up to V
DD
(I
trt(pu)
) allows fast rising
edges into heavily loaded outputs. These devices turn on when an output is written HIGH,
and are switched off by the negative edge of SCL. The I/Os should be HIGH before being
used as inputs. After power-on, as all the I/Os are set HIGH, all of them can be used as
inputs. Any change in setting of the I/Os as either inputs or outputs can be done with the
write mode.
Remark: If a HIGH is applied to an I/O which has been written earlier to LOW, a large
current (I
OL
) will flow to V
SS
.
8.2 Writing to the port (Output mode)
To write, the master (microcontroller) first addresses the slave device. By setting the last
bit of the byte containing the slave address to logic 0 the Write mode is entered. The
PCA9673 acknowledges and the master sends the first data byte for P07 to P00. After the
first data byte is acknowledged by the PCA9673, the second data byte P17 to P10 is sent
by the master. Once again, the PCA9673 acknowledges the receipt of the data. Each 8-bit
data is presented on the port lines after it has been acknowledged by the PCA9673.
The number of data bytes that can be sent successively is not limited. After every two
bytes, the previous data is overwritten.
The first data byte in every pair refers to Port 0 (P07 to P00), whereas the second data
byte in every pair refers to Port 1 (P17 to P10). See Figure 13
.
Fig 13. Correlation between bits and ports
A
002aab634
06 05 04 03 02 01 00
first byte
07
P06 P05 P04 P03 P02 P01 P00P07
A16 15 14 13 12 11 10
second byte
17
P16 P15 P14 P13 P12 P11 P10P17
PCA9673 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 29 September 2011 12 of 33
NXP Semiconductors
PCA9673
Remote 16-bit I/O expander for Fm+ I
2
C-bus with interrupt and reset
8.3 Reading from a port (Input mode)
All ports programmed as input should be set to logic 1. To read, the master
(microcontroller) first addresses the slave device after it receives the interrupt. By setting
the last bit of the byte containing the slave address to logic 1 the Read mode is entered.
The data bytes that follow on the SDA are the values on the ports. If the data on the input
port changes faster than the master can read, this data may be lost.
Fig 14. Write mode (output)
A5 A4 A3 A2 A1 A0 0 ASA6
slave address
START condition R/W
acknowledge
from slave
002aab632
P
06
1
P
07
data to port 0
A
acknowledge
from slave
12345678SCL 9
SDA
A
acknowledge
from slave
write to port
data output from port
t
v(Q)
P05
data to port 1
data A0 and B0 valid
P16 output voltage
I
trt(pu)
I
OH
t
d(rst)
P16 pull-up output current
INT
P
04
P
03
P
02
P
01
P
00
P
17
P
14
P
13
P
12
P
11
P
10
1
P16
P
15
t
v(Q)
data A0 and B0 valid
P05 output voltage
I
trt(pu)
I
OH
P05 pull-up output current

PCA9673DB,112

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC I/O EXPANDER I2C 16B 24SSOP
Lifecycle:
New from this manufacturer.
Delivery:
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