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PCA9673DB,112

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33
PCA9673 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 29 September 2011 7 of 33
NXP Semiconductors
PCA9673
Remote 16-bit I/O expander for Fm+ I
2
C-bus with interrupt and reset
7.2 Software Reset call, and Device ID addresses
Two other different addresses can be sent to the PCA9673.
• General Call address: allows to reset the PCA9673 through the I
2
C-bus upon
reception of the right I
2
C-bus sequence. See Section 7.2.1 “Software Reset” for more
information.
• Device ID address: allows to read ID information from the device (manufacturer, part
identification, revision). See Section 7.2.2 “
Device ID (PCA9673 ID field)” for more
information.
V
SS
V
SS
010010048h
V
SS
V
DD
01001014Ah
V
DD
V
SS
01001104Ch
V
DD
V
DD
01001114Eh
V
SS
SCL010110058h
V
SS
SDA01011015Ah
V
DD
SCL01011105Ch
V
DD
SDA01011115Eh
Table 3. PCA9673 address map …continued
AD1 AD0 A6 A5 A4 A3 A2 A1 A0 Address (hex)
Fig 8. General Call address
Fig 9. Device ID address
0
002aac155
0 0 0 0 0 0 0
R/W
PCA9673 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 29 September 2011 8 of 33
NXP Semiconductors
PCA9673
Remote 16-bit I/O expander for Fm+ I
2
C-bus with interrupt and reset
7.2.1 Software Reset
The Software Reset Call allows all the devices in the I
2
C-bus to be reset to the power-up
state value through a specific formatted I
2
C-bus command. To be performed correctly, it
implies that the I
2
C-bus is functional and that there is no device hanging the bus.
The Software Reset sequence is defined as following:
1. A START command is sent by the I
2
C-bus master.
2. The reserved General Call I
2
C-bus address ‘0000 000’ with the R/W bit set to 0 (write)
is sent by the I
2
C-bus master.
3. The PCA9673 device(s) acknowledge(s) after seeing the General Call address
‘0000 0000’ (00h) only. If the R/W
bit is set to 1 (read), no acknowledge is returned to
the I
2
C-bus master.
4. Once the General Call address has been sent and acknowledged, the master sends
1 byte. The value of the byte must be equal to 06h.
a. The PCA9673 acknowledges this value only. If the byte is not equal to 06h, the
PCA9673 does not acknowledge it.
If more than 1 byte of data is sent, the PCA9673 does not acknowledge any more.
5. Once the right byte has been sent and correctly acknowledged, the master sends a
STOP command to end the Software Reset sequence: the PCA9673 then resets to
the default value (power-up value) and is ready to be addressed again within the
specified bus free time. If the master sends a Repeated START instead, no reset is
performed.
The I
2
C-bus master must interpret a non-acknowledge from the PCA9673 (at any time) as
a ‘Software Reset Abort’. The PCA9673 does not initiate a reset of its registers.
The unique sequence that initiates a Software Reset is described in Figure 10
.
Fig 10. Software Reset sequence
002aac307
0 0 0 0 0 0 0 AS 0
SWRST Call I
2
C-bus address
START condition R/W
acknowledge
from slave(s)
0 0 0 0 1 1 00
SWRST data = 06h
A
acknowledge
from slave(s)
P
PCA9673 is(are) reset.
Registers are set to default power-up values.
PCA9673 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 2 — 29 September 2011 9 of 33
NXP Semiconductors
PCA9673
Remote 16-bit I/O expander for Fm+ I
2
C-bus with interrupt and reset
7.2.2 Device ID (PCA9673 ID field)
The Device ID field is a 3-byte read-only (24 bits) word giving the following information:
• 8 bits with the manufacturer name, unique per manufacturer (for example,
NXP Semiconductors).
• 13 bits with the part identification, assigned by manufacturer, the 7 MSBs with the
category ID and the 6 LSBs with the feature ID (for example, PCA9673 16-bit
quasi-output I/O expander).
• 3 bits with the die revision, assigned by manufacturer (for example, Rev X).
The Device ID is read-only, hardwired in the device and can be accessed as follows:
1. START command
2. The master sends the Reserved Device ID I
2
C-bus address ‘1111 100’ with the R/W
bit set to 0 (write).
3. The master sends the I
2
C-bus slave address of the slave device it needs to identify.
The LSB is a ‘Don’t care’ value. Only one device must acknowledge this byte (the one
that has the I
2
C-bus slave address).
4. The master sends a Re-START command.
Remark: A STOP command followed by a START command will reset the slave state
machine and the Device ID read cannot be performed.
Remark: A STOP command or a Re-START command followed by an access to
another slave device will reset the slave state machine and the Device ID read cannot
be performed.
5. The master sends the Reserved Device ID I
2
C-bus address ‘1111 100’ with the R/W
bit set to 1 (read).
6. The device ID read can be done, starting with the 8 manufacturer bits (first byte +
4 MSB of the second byte), followed by the 13 part identification bits and then the
3 die revision bits (3 LSB of the third byte).
7. The master ends the reading sequence by NACKing the last byte, thus resetting the
slave device state machine and allowing the master to send the STOP command.
Remark: The reading of the Device ID can be stopped anytime by sending a NACK
command.
Remark: If the master continues to ACK the bytes after the third byte, the PCA9673
rolls back to the first byte and keeps sending the Device ID sequence until a NACK
has been detected.
For the PCA9673, the Device ID is as shown in Figure 11
.
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PCA9673DB,112

Mfr. #:
Buy PCA9673DB,112
Manufacturer:
NXP Semiconductors
Description:
IC I/O EXPANDER I2C 16B 24SSOP
Lifecycle:
New from this manufacturer.
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