7
LTC3717-1
sn37171 37171fs
FU CTIO AL DIAGRA
U
U
W
1.4V
0.7V
V
RNG
3
V
REF
10
V
ON
1
+
+
+
+
+
+
6
I
ON
2.4V0.7V
16
V
IN
15
EXTV
CC
4.7V
R
ON
V
VON
I
ION
t
ON
= (10pF)
R
SQ
20k
I
CMP
I
REV
×
5.7µA
SHDN
SWITCH
LOGIC
BG
ON
OV
1
240k
Q1
Q2
0.6V
0.6V
I
TH
R
C
R1
40k
C
C1
EA
SS
+
Q5
4
R2
80k
RUN/SS
C
SS
31
37171 FD01
SGND
5
7
RUN
SHDN
19
PGND
20
SENSE
21
PGOOD
DRV
CC
V
FB
2
INTV
CC
17
SW
24
SENSE
+
23
TG
C
B
V
IN
C
IN
27
BOOST
28
+
+
UV
3/10V
REF
OV
11/30V
REF
C
VCC
V
OUT
M2
M1
L1
C
OUT
+
0.8V
REF
5V
REG
1.2µA
6V
D
B
I
THB
R4
40k
R3
20k
18
UU
U
PI FU CTIO S
BOOST (Pin 28): Boosted Floating Driver Supply. The (+)
terminal of the bootstrap capacitor C
B
connects here. This
pin swings from a diode voltage drop below INTV
CC
up to
V
IN
+ INTV
CC
.
RUN/SS (Pin 31): Run Control and Soft-Start Input. A
capacitor to ground at this pin sets the ramp time to full
output current (approximately 3s/µF) and the time delay
for overcurrent latchoff (see Applications Information).
Forcing this pin below 0.8V shuts down the device.
8
LTC3717-1
sn37171 37171fs
OPERATIO
U
Main Control Loop
The LTC3717-1 is a current mode controller for DC/DC
step-down converters. In normal operation, the top
MOSFET is turned on for a fixed interval determined by a
one-shot timer OST. When the top MOSFET is turned off,
the bottom MOSFET is turned on until the current com-
parator I
CMP
trips, restarting the one-shot timer and initi-
ating the next cycle. Inductor current is determined by
sensing the voltage between the SENSE
+
and SENSE
pins
using the bottom MOSFET on-resistance . The voltage on
the I
TH
pin sets the comparator threshold corresponding
to inductor valley current. The error amplifier EA adjusts
this I
TH
voltage by comparing 2/3 of the feedback signal
V
FB
from the output voltage with a reference equal to 1/3
of the V
REF
voltage. If the load current increases, it causes
a drop in the feedback voltage relative to the reference. The
I
TH
voltage then rises until the average inductor current
again matches the load current. As a result in normal DDR
operation V
OUT
is equal to 1/2 of the V
REF
voltage.
The operating frequency is determined implicitly by the
top MOSFET on-time and the duty cycle required to
maintain regulation. The one-shot timer generates an on-
time that is proportional to the ideal duty cycle, thus
holding frequency approximately constant with changes
in V
IN
. The nominal frequency can be adjusted with an
external resistor R
ON
.
Overvoltage and undervoltage comparators OV and UV
pull the PGOOD output low if the output feedback voltage
exits a ±10% window around the regulation point.
Furthermore, in an overvoltage condition, M1 is turned off
and M2 is turned on and held on until the overvoltage
condition clears.
Pulling the RUN/SS pin low forces the controller into its
shutdown state, turning off both M1 and M2. Releasing
the pin allows an internal 1.2µA current source to charge
up an external soft-start capacitor C
SS
. When this voltage
reaches 1.5V, the controller turns on and begins switch-
ing, but with the I
TH
voltage clamped at approximately
0.6V below the RUN/SS voltage. As C
SS
continues to
charge, the soft-start current limit is removed.
INTV
CC
/EXTV
CC
Power
Power for the top and bottom MOSFET drivers and most
of the internal controller circuitry is derived from the
INTV
CC
pin. The top MOSFET driver is powered from a
floating bootstrap capacitor C
B
. This capacitor is re-
charged from INTV
CC
through an external Schottky diode
D
B
when the top MOSFET is turned off. When the EXTV
CC
pin is grounded, an internal 5V low dropout regulator
supplies the INTV
CC
power from V
CC
. If EXTV
CC
rises
above 4.7V, the internal regulator is turned off, and an
internal switch connects EXTV
CC
to INTV
CC
. This allows
a high efficiency source connected to EXTV
CC
, such as an
external 5V supply or a secondary output from the
converter, to provide the INTV
CC
power. Voltages up to
7V can be applied to EXTV
CC
for additional gate drive. If
the V
CC
voltage is low and INTV
CC
drops below 3.4V,
undervoltage lockout circuitry prevents the power
switches from turning on.
9
LTC3717-1
sn37171 37171fs
APPLICATIO S I FOR ATIO
WUUU
the source of the bottom MOSFET M2 and ground. Con-
nect the
SENSE
+
and SENSE
pins as a Kelvin connection
to the sense resistor with SENSE
+
at the source of the
bottom MOSFET and the SENSE
pin to PGND. Using a
sense resistor provides a well defined current limit, but
adds cost and reduces efficiency. Alternatively, one can
eliminate the sense resistor and use the bottom MOSFET
as the current sense element by simply connecting the
SE
NSE
+
pin to the drain and the SENSE
pin to the source
of the bottom MOSFET. This improves efficiency, but one
must carefully choose the MOSFET on-resistance as dis-
cussed in a later section.
Power MOSFET Selection
The LTC3717-1 requires two external N-channel power
MOSFETs, one for the top (main) switch and one for the
bottom (synchronous) switch. Important parameters for
the power MOSFETs are the breakdown voltage V
(BR)DSS
,
threshold voltage V
(GS)TH
, on-resistance R
DS(ON)
, reverse
transfer capacitance C
RSS
and maximum current I
DS(MAX)
.
The gate drive voltage is set by the 5V INTV
CC
supply.
Consequently, logic-level threshold MOSFETs must be
used in LTC3717-1 applications.
When the bottom MOSFET is used as the current sense
element, particular attention must be paid to its
on-resistance. MOSFET on-resistance is typically speci-
fied with a maximum value R
DS(ON)(MAX)
at 25°C. In this
case, additional margin is required to accommodate the
rise in MOSFET on-resistance with temperature:
R
R
DS ON MAX
SENSE
T
()( )
=
ρ
The ρ
T
term is a normalization factor (unity at 25°C)
accounting for the significant variation in on-resistance
with temperature, typically about 0.4%/°C as shown in
Figure 2. For a maximum junction temperature of 100°C,
using a value ρ
T
= 1.3 is reasonable.
The power dissipated by the top and bottom MOSFETs
strongly depends upon their respective duty cycles and
the load current. During normal operation, the duty cycles
for the MOSFETs are:
A typical LTC3717-1 application circuit is shown in
Figure 1. External component selection is primarily de-
termined by the maximum load current and begins with
the selection of the sense resistance and power MOSFET
switches. The LTC3717-1 uses the on-resistance of the
synchronous power MOSFET for determining the induc-
tor current. The desired amount of ripple current and
operating frequency largely determines the inductor value.
Finally, C
IN
is selected for its ability to handle the large
RMS current into the converter and C
OUT
is chosen with
low enough ESR to meet the output voltage ripple and
transient specification.
Maximum Sense Voltage and V
RNG
Pin
Inductor current is determined by measuring the voltage
across a sense resistance that appears between the
SENSE
+
and SENSE
pins. The maximum sense voltage
is set by the voltage applied to the V
RNG
pin and is equal
to approximately (0.13)V
RNG
for sourcing current and
(0.17)V
RNG
for sinking current. The current mode control
loop will not allow the inductor current valleys to exceed
(0.13)V
RNG
/R
SENSE
for sourcing current and (0.17)V
RNG
for sinking current. In practice, one should allow some
margin for variations in the LTC3717-1 and external
component values and a good guide for selecting the
sense resistance is:
R
V
I
SENSE
RNG
OUT MAX
=
10
()
when V
RNG
= 0.5 – 2V.
An external resistive divider from INTV
CC
can be used to
set the voltage of the V
RNG
pin between 0.5V and 2V
resulting in nominal sense voltages of 50mV to 200mV.
Additionally, the V
RNG
pin can be tied to SGND or INTV
CC
in which case the nominal sense voltage defaults to 70mV
or 140mV, respectively. The maximum allowed sense
voltage is about 1.3 times this nominal value for positive
output current and 1.7 times the nominal value for nega-
tive output current.
Connecting the SENSE
+
and SENSE
Pins
The LTC3717-1 can be used with or without a sense
resistor. When using a sense resistor, it is placed between

LTC3717EUH-1#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Power Supply for DDR in QFN
Lifecycle:
New from this manufacturer.
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