IA6805E2 29 August 2007
Microprocessor Unit
As of Production Version 00
IA6805E2
Microprocessor Unit
Data Sheet
Copyright © 2007 IA211081401-03 www.Innovasic.com
Customer Support:
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IA6805E2 29 August 2007
Microprocessor Unit
As of Production Version 00
FEATURES
Copyright © 2007 IA211081401-03 www.Innovasic.com
Customer Support:
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©
Form, Fit, and Function Compatible with the Harris
©
CDP6805E2CE and
Motorola
©
MC146805E2
Internal 8-bit Timer with 7-Bit
Programmable Prescaler
On-chip Clock
Memory Mapped I/O
Versatile Interrupt Handling
True Bit Manipulation
Bit Test and Branch Instruction
Vectored Interrupts
Power-saving STOP and WAIT Modes
Fully Static Operation
112 Bytes of RAM
Packaging options available: 40 Pin Plastic DIP or, 44 Pin Plastic
Leaded Chip Carrier, Standard or RoHS packages available
The IA6805E2 is a "plug-and-play" drop-in replacement for the original IC. Innovasic produces replacement
ICs using its MILES
TM
, or Managed IC Lifetime Extension System, cloning technology. This technology
produces replacement ICs far more complex than "emulation" while ensuring they are compatible with the
original IC. MILES
TM
captures the design of a clone so it can be produced even as silicon technology
advances. MILES
TM
also verifies the clone against the original IC so that even the "undocumented features"
are duplicated. This data sheet documents all necessary engineering information about the IA6805E2
including functional and I/O descriptions, electrical characteristics, and applicable timing.
Package Pinout
A12
NC
(6)AS
(1)RESET_N
(2)
IRQ_N
(3)
LI
(4)DS
(5)RW_N
(7)PA7
(8)
(9)PA5
(10)
(11)
(12)PA2
(13)PA1
(14)
40 Pin DIP
IA6805E2
PB4
PB5
PB6
PB7
(20)VSS
(15)
A12
(16)
A11
(17)
A10
(18)A9
(19)A8
(21)
(22)
(23)
(24)
B6
B7
(40)
(39)
(38)
(37)
(36)
(35)
(34)
(33)
(32)
(31)
(30)
(29)
(28)
(27)
(26)
(25)
PA0
B4
B5
B2
B3
B0
B1
PB2
PB3
PB0
PB1
OSC2
TIMER
VDD
OSC1
PA6
PA4
PA3
RW_N
NC
B2
44 Pin LCC
IA6805E2
(12)PA3
(7)AS
(8)PA7
(9)
PA6
(10)PA5
(11)PA4
(13)PA2
(14)PA1
(15)PA0
(16)NC
(17)NC
PB1
PB7
PB6
PB5
PB3
PB2
A10
A11
(6)
(5)
(4)
(3)
(2)
(1)
(44)
(43)
(42)
OSC2
(41) TIMER
(40)
PB0
(34)
(39)
(38)
(37)
(36)
(35)
(33)
(32)
(31)
(30)
(29)
(18)
(19)
(20)
(21)
(22)
(23)
(24)
(25)
(26)
(27)
(28)
VDD
OSC1
IRQ_N
RESET_N
DS
LI
A8
A9
B7
VSS
B5
B6
B4
B3
B1
B0
PB4
IA6805E2 29 August 2007
Microprocessor Unit
As of Production Version 00
Description
The IA6805E2 (CMOS) Microprocessor Unit (MPU) is a low cost, low power MPU. It features a
CPU, on-chip RAM, parallel I/O compatibility with pins programmable as input or output. The
following paragraphs will further describe this system block diagram and design in more detail.
PROGRAM
COUNTER
LOW
112x8
RAM
ADDRESS
DRIVE
MUX
BUS
DRIVE
CPU
PORT
A
REG
OSCILLATOR
DATA
DIR
REG
PORT
B
REG
DATA
DIR
REG
CPU
CONTROL
ALU
BUS
CONTROL
STACK
POINTER
CONDITION
CODE
REGISTER
INDEX
REGISTER
ACCUMULATOR
PROGRAM
COUNTER
HIGH
TIMER CONTROL
PRESCALER
TIMER/
COUNTER
PA0
PA7
PA6
PA5
PA4
PA3
PA2
PA1
PB0
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PA0
OSC1 OSC2
TIMER
RESET_N
LI
IRQ_N
B0
B7
B6
B5
B4
B3
B2
B1
A8
A12
A11
A10
A9
RW_N
DS
AS
8A
5
6
5
8
8
X
CC
SP
PCH
PCL
PORT
A
I/O
LINES
PORT
B
I/O
LINES
MULTIPLEXED
ADDRESS
DATA
BUS
ADDRESS
BUS
ADDRESS STROBE
DATA STROBE
READ/WRITE
Copyright © 2007 IA211081401-03 www.Innovasic.com
Customer Support:
Figure 1. System Block Diagram
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©

IA6805E2PDW40IR0

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Microprocessors - MPU Replacement for Motorola MC146805E2
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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