TLE 7209-2R
Circuit Description
Final Datasheet 13 V1.3, 2005-jan-11
2.4.2.3 SPI-Communication
The 16 input bits consist of the SPI-instruction byte and a second, unused byte. The 16
output bits consist of the verification-byte and the data-byte (see also Figure 8). The
definition of these bytes is given in the subsequent sections.
Figure 8 SPI communication
2.4.2.4 SPI instruction
The uppermost 2 bit of the instruction byte contain the chip-address. The chip-address
of the TLE 7209-2R is 00. During read-access, the output data according to the register
requested in the instruction byte are applied to SDO within the same SPI frame. That
means, the output data corresponding to an instruction byte sent during one SPI frame
are transmitted to SDO during the same SPI frame.
Table 3 SPI Instruction Format
MSB
76543210
0 0 INSTR4 INSTR3 INSTR2 INSTR1 INSTR0 INSW
Table 4 SPI instruction Description
Bit Name Description
7,6 CPAD1,0 Chip Address (has to be ‘0’, ‘0’)
5-1 INSTR (4-0) SPI instruction (encoding)
0 INSW Even parity
0
7
654
3
210
7
6
5
43
2
1
SDI
SCK
CSN
SDO
SPI Instruction not used
MSB LSB
Verification byte data-byte
MSB LSB MSB LSB
