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DEMOBOARD TLE 7209-2R

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P32
TLE 7209-2R
Electrical Characteristics
Final Datasheet 22 V1.3, 2005-jan-11
3.4.16 Leakage current – – – 200 µA Output stage
switched off
3.4.17 Free-wheel diode
forward voltage
U
D
––2VI
OUT
= 3 A
3.4.18 Free-wheel diode
reverse recovery time
t
rr
– – 100 ns Reverse recovery
time is not subject to
production test;
specified by design
Output Status-flag, Open Drain Output DMS < 0.8 V
3.4.19 Output “high”
(SF not set)
I
SF
––20µA V
SF
= 5 V
3.4.20 Output “low”
(SF set)
I
SF
300 – – µA V
SF
= 1 V
100 – – µA
V
SF
= 0.5 V
Timing
3.4.21 Output ON-delay
t
don
––6µs IN1 --> OUT1 resp.
IN2 --> OUT2, I
OUT
=
3 A
3.4.22 Output OFF-delay
t
doff
––6µs IN1 --> OUT1 resp.
IN2 --> OUT2,
I
OUT
=
3 A
3.4.23 Output switching time
t
r
, t
f
––5µs OUT1H --> OUT1L,
OUT2H --> OUT2L,
I
OUT
= 3 A
OUT1L --> OUT1H,
OUT2L --> OUT2H
3.4.24 Disable delay time
t
ddis
––2µs DIS --> OUTn,
EN --> OUTn
3.4.25 Power on delay time – – – 1 ms
V
S
= on --> output
stage active; no load
3.4.26 Delay time for fault
detection
t
df
1.0 2 – µs specified by design
3.4.27 Minimum pulse width
t
den
–1.62.2µs EN/DIS-->Reset
DIA_REG
3.4 Electrical Characteristics (cont’d)
5V < V
S
< 28V; – 40 °C < T
j
< 150 °C; unless otherwise specified
Pos. Parameter Symbol Limit Values Unit Test Conditions
min. typ. max.
TLE 7209-2R
Electrical Characteristics
Final Datasheet 23 V1.3, 2005-jan-11
Input SCK, SPI Clock Input
3.4.28 Low Level
U
SCKL
––1V–
3.4.29 High Level
U
SCKH
2––V–
3.4.30 Hysteresis ∆
U
SCK
0.1 – 0.4 V –
3.4.31 Input Capacity
C
SCK
––20 pF –
3.4.32 Input Current -
I
SCK
–2050µA Pull-up current source
connected to
V
CC
Input CSN, Chip Select Signal
3.4.33 Low Level
U
CSNL
– – 1 V TLE 7209-2R is
selected
3.4.34 High Level
U
CSNH
2––V–
3.4.35 Hysteresis ∆
U
CSN
0.1 – 0.4 V –
3.4.36 Input Capacity
C
CSN
––20 pF –
3.4.37 Input Current -
I
CSN
–2050µA Pull up current source
connected to
V
CC
Input SDI, SPI Data Input
3.4.38 Low Level
U
SDIL
––1V–
3.4.39 High Level
U
SDIH
2––V–
3.4.40 Hysteresis ∆
U
SDI
0.1 – 0.4 V –
3.4.41 Input Capacity
C
SDI
––20 pF –
3.4.42 Input Current -
I
SDI
–2050µA Pull up current source
connected to
V
CC
3.4 Electrical Characteristics (cont’d)
5V < V
S
< 28V; – 40 °C < T
j
< 150 °C; unless otherwise specified
Pos. Parameter Symbol Limit Values Unit Test Conditions
min. typ. max.
TLE 7209-2R
Electrical Characteristics
Final Datasheet 24 V1.3, 2005-jan-11
Output SDO
Tristate Output of the TLE 7209-2R (SPI output);
3.4.43 Low Level
V
SDOL
––0.4VI
SDO
= 2 mA
3.4.44 High Level
V
SDOH
V
DMS
- 0.75
––V
I
SDO
= -2 mA
3.4.45 Capacity
C
SDO
––30 pF Capacity of the pin in
tristate
3.4.46 Leakage Current
I
SDO
-10 – 10 µA In tristate
Note: All in- and output pin capacities are not subject to production test; specified by design
Input DMS
Supply-Input for the SPI-Interface and Selection Pin for SPI- or SF-Mode
3.4.47 Input Voltage
V
DMS
3.5 – – V SPI-Mode
V
DMS
– – 0.8 V Status-Flag-Mode
3.4.48 Input Current
I
DMS
– – 10 mA SPI-Mode
Open-Load Diagnosis
3.4.49 Diagnostic Threshold
V
OUT1
0.8 – 2.0 V DMS > 4.5 V, EN <
0.8 V or DIS > 4.5 V;
no load
V
OUT2
0.8 – 2.0 V
3.4.50 Pull-up Current -
I
OUT1
1000 1500 2000 µA V
OUT1
=0 V,
DMS > 4.5 V, EN <
0.8 V or DIS > 4.5 V;
no load
3.4.51 Pull-down Current
I
OUT2
700 1000 1400 µA V
OUT2
=5 V,
DMS > 4.5 V, EN <
0.8 V or DIS > 4.5 V;
no load
3.4.52 Tracking Diag. C – 1.2 1.5 1.7 –
I
OUT1
/I
OUT2
3.4.53 Delay Time t
D
30 – 100 ms –
Note: Open Load is detected if V
OUT1
> 2 V AND V
OUT2
< 0.8 V (refer to fig. 9).
3.4 Electrical Characteristics (cont’d)
5V < V
S
< 28V; – 40 °C < T
j
< 150 °C; unless otherwise specified
Pos. Parameter Symbol Limit Values Unit Test Conditions
min. typ. max.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P32

DEMOBOARD TLE 7209-2R

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Buy DEMOBOARD TLE 7209-2R
Manufacturer:
Infineon Technologies
Description:
BOARD DEMO FOR TLE 7209-2R
Lifecycle:
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