EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
XRD9827
12-Bit Linear CIS/CCD Sensor
Signal Processor with Serial Control
December 2000-2
FEATURES
· 12-Bit Resolution, No Missing Codes
· One-channel 6MSPS Pixel Rate
· Triple-channel 2MSPS Pixel Rate
· 6-Bit Programmable Gain Amplifier
· 8-Bit Programmable Offset Adjustment
· CIS or CCD Compatibility
· Internal Clamp for CIS or CCD AC Coupled
Configurations
· 3.0V or 5V Operation & I/O Compatibility
· Serial Load Control Registers
· Low Power CMOS: 200mW-typ
· Low Cost 20-Lead Packages
· USB Compliant
APPLICATIONS
· Color and Grayscale Flatbed Scanners
· Color and Grayscale Sheetfed Scanners
· Multifunction Peripherals
· Digital Color Copiers
· General Purpose CIS or CCD Imaging
· Low Cost Data Acquisition
· Simple and Direct Interface to Canon 600 DPI
Sensors
ORDERING INFORMATION
Package Type Temperature Range Part Number
20-Lead SOIC 0°C to +70°C XRD9827ACD
20-Lead SSOP 0°C to +70°C XRD9827ACU
GENERAL DESCRIPTION
The XRD9827 is a complete linear CIS or CCD sensor
signal processor on a single monolithic chip. The
XRD9827 includes a high speed 12-Bit resolution ADC,
a 6-Bit Programmable Gain Amplifier with gain adjust-
ment of 1 to 10, and 8-Bit programmable input referred
offset calibration range of 800mV.
In the CCD configuration the input signal is AC coupled
with an external capacitor. An internal clamp sets the
black level. In the CIS configuration, the clamp switch
can be disabled and the CIS output signal is DC coupled
from the CIS sensor to the XRD9827. The CIS signal
is level shifted to VRB in order to use the full range of
the ADC. In the CIS configuration the input can also be
AC coupled similar to the CCD configuration. This
enables CIS signals with large black levels to be
internally clamped to a DC reference equal to the black
level. The DC reference is internally subtracted from
the input signal.
The CIS configuration can also be used in other appli-
cations that do not require CDS function, such as low
cost data acquisition.
Rev. 3.00
XRD9827
2
Rev. 3.00
Figure 1. Functional Block Diagram
RED
GRN
BLU
VDCEXT
VREF+
DB7:0
DVDD
DGND
AVDD
AGND
ADCCLK
CLAMP
SYNCH
PGA
TIMING
&
CONTROL LOGIC
AVDD
6-BIT GAIN
REGISTERS
12-BIT
ADC
RL
AGND
DATA
I/O
PORT
BUFFER
VRT
VRB
Triple
S/H
&
3-1
MUX
8-BIT DAC
12
8
8-BIT OFFSET
REGISTERS
6
8
+
_
AGND
V
DCREF
DC/AC
INT/EXT_V
DCREF
CIS/CCD
G<5:0>
O<7:0>
R G B
R G B
CLP
CLAMP
Power
Down
Power
Down
VRT
CCD
CIS
VBG
CIS REF Circuit
CIS REF Circuit
DC Reference
XRD9827
3
Rev. 3.00
PIN CONFIGURATION
AVDD
VREF+
XRD9827ACD
20
19
18
17
16
15
14
13
12
RED
GRN
BLU
VDCEXT
AGND
1
2
3
4
5
6
7
8
9
DVDD
DB0
DB1
DB2
DB4
DGND ADCCLK
DB3
10
11
DB5/SCLK
DB6/SDATA
DB7/LD
CLAMP
SYNCH
20-Lead SOIC
PIN DESCRIPTION
Pin # Symbol Description
1 DVDD Digital VDD (for Output Drivers)
2 DB0 Data Output Bit 0
3 DB1 Data Output Bit 1
4 DB2 Data Output Bit 2
5 DB3 Data Output Bit 3
6 DB4 Data Output Bit 4
7 DB5/SCLK Data Output Bit 5 & Data Input SCLK
8 DB6/SDATA Data Output Bit 6 & Data Input SDATA
9 DB7/LD Data Output Bit 7 & LD
10 DGND Digital Ground (for Output Drivers)
11 ADCCLK A/D Converter Clock
12 CLAMP Clamp and Video Sample Clock
13 SYNCH Start of New Line and Serial Data Input Control
14 AGND Analog Ground
15 VREF+ A/D Positive Reference for Decoupling Cap
16 VDCEXT External DC Reference
17 BLU Blue Input
18 GRN Green Input
19 RED Red Input
20 AVDD Analog Power Supply

XRD9827ACU

Mfr. #:
Manufacturer:
MaxLinear
Description:
IC AFE 3 CHAN 12BIT 20SSOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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