Document Number: 001-98440 Rev. *F Page 14 of 30
Power
The following power system diagram shows the set of power
supply pins as implemented in EZ-PD CCG4.
CCG4 shall be able to operate from three possible external
supply sources: V5V_P1 for first Type-C port, V5V_P2 for
second Type- C port and VDDD.
CCG4 has the power supply input V5V_P1 and V5V_P2 pins for
providing power to EMCA cables through integrated VCONN
FETs. There are two VCONN FETs in CCG4 per Type-C port to
power either CC1 or CC2 pin. These FETs are capable of
providing a minimum of 1W on the CC1 and CC2 pins for the
EMCA cables. In USB-PD applications, the valid levels on
V5V_P1 and V5V_P2 supplies can range from 4.85 V to 5.5 V.
The chip’s internal operating power supply is derived from
VDDD. In UFP mode, CCG4 operates in 2.7 V – 5.5V. In DFP
and DRP modes, it operates in the 3.0 V – 5.5 V range.
A separate I/O supply pin, VDDIO, allows the GPIOs to operate
at levels from 1.71 V to 5.5 V. The VDDIO pin can be equal to or
less than the voltages connected to the V5V_P1 or V5V_P2 and
VDDD pins. The VDDIO supply should be less than or equal to
VDDD supply.
The VCCD output of EZ-PD CCG4 must be bypassed to ground
via an external capacitor (in the range of 80 to 120 nF; X5R
ceramic or better).
Bypass capacitors must be used from VDDD and V5V_P1 or
V5V_P2 pins to ground; typical practice for systems in this
frequency range is to use a 0.1-µF capacitor on VDDD, V5V_P1
and V5V_P2. Note that these are simply rules of thumb and that
for critical applications, the PCB layout, lead inductance, and the
bypass capacitor parasitic should be simulated to design and
obtain optimal bypassing.
Figure 5 shows an example of the power supply bypass
capacitors.
Figure 5. EZ-PD CCG4 Power and Bypass Scheme Example
Note
5. V5V_P1 denoted power supply input for Type-C port 1
V5V_P2 denoted power supply input for Type-C port 2
6. CC1_1:USB PD connector detect/Configuration Channel 1 for Type-C port 1
CC1_2:USB PD connector detect/Configuration Channel 1 for Type-C port 2
7. CC2_1:USB PD connector detect/Configuration Channel 2 for Type-C port 1
CC2_2:USB PD connector detect/Configuration Channel 2 for Type-C port 2
V
SS
CC2_P1
V
DDD
Core Regulator
(SRSS-Lite)
CC1_P1
V
CCD
Core
V
DDIO
GPIOs
2 x CC
Tx/Rx
V5V_P1
CC2_P2CC1_P2
V5V_P2
