AD7796BRUZ Datasheet AD7796BRUZ, AD7797BRUZ, AD7796BRUZ-REEL | P13-P15

Data Sheet AD7796/AD7797

Rev. B | Page 13 of 24

Table 13. Operating Modes

MD2 MD1 MD0 Mode

0 0 0

Continuous Conversion Mode (default). In continuous conversion mode, the ADC continuously performs

conversions and places the result in the data register. RDY goes low when a conversion is complete. The user can

read these conversions by placing the device in continuous read mode, whereby the conversions are automatically

placed on the DOUT line when SCLK pulses are applied. Alternatively, the user can instruct the ADC to output the

conversion by writing to the communication register. After a power-on, channel change, or write to the mode or

configuration register, the first conversion is available after a period of 2/f

ADC

, while subsequent conversions are

available at a frequency of f

ADC

0 0 1

Single Conversion Mode. When single conversion mode is selected, the ADC powers up and performs a single

conversion. The oscillator requires 1 ms to power up and settle. The ADC then performs the conversion, which takes

a time of 2/f

ADC

. The conversion result is placed in the data register, RDY goes low, and the ADC returns to power-

down mode. The conversion remains in the data register and RDY remains active (low) until the data is read or

another conversion is performed.

0 1 0

Idle Mode. In idle mode, the ADC filter and modulator are held in a reset state although the modulator clocks are

still provided.

0 1 1

Power-Down Mode. In power-down mode, all the AD7796/AD7797 circuitry is powered down, including the

burnout currents and CLKOUT circuitry.

1 0 0

Internal Zero-Scale Calibration. An internal short is automatically connected to the channel. A calibration takes

two conversion cycles to complete. RDY goes high when the calibration is initiated and returns low when the

calibration is complete. The ADC is placed in idle mode following a calibration. The measured offset coefficient is

placed in the offset register.

1 0 1 Reserved.

1 1 0

System Zero-Scale Calibration. Users should connect the system zero-scale input to the channel input pins.

A system offset calibration takes two conversion cycles to complete.

RDY goes high when the calibration is

initiated and returns low when the calibration is complete. The ADC is placed in idle mode following a calibration.

The measured offset coefficient is placed in the offset register.

1 1 1

System Full-Scale Calibration. Users should connect the system full-scale input to the channel input pins.

A calibration takes two conversion cycles to complete. RDY goes high when the calibration is initiated and returns

low when the calibration is complete. The ADC is placed in idle mode following a calibration. The measured full-

scale coefficient is placed in the full-scale register.

Table 14. Update Rates Available

FS3 FS2 FS1 FS0 f

ADC

(Hz) t

SETTLE

(ms) Rejection at 50 Hz/60 Hz (Internal Clock)

0 0 0 0 X X

0 0 0 1 X X

0 0 1 0 X X

123

0 1 0 0 62 32

0 1 0 1 50 40

0 1 1 0 X X

0 1 1 1 33.2 60

1 0 0 0 X X

1 0 0 1 16.7 120 80 dB (50 Hz only)

1 0 1 0 16.7 120 65 dB (50 Hz and 60 Hz)

1 0 1 1 12.5 160 66 dB (50 Hz and 60 Hz)

1 1 0 0 10 200 69 dB (50 Hz and 60 Hz)

1 1 0 1 8.33 240 70 dB (50 Hz and 60 Hz)

6.25

320

72 dB (50 Hz and 60 Hz)

1 1 1 1 4.17 480 74 dB (50 Hz and 60 Hz)

AD7796/AD7797 Data Sheet

Rev. B | Page 14 of 24

CONFIGURATION REGISTER

RS2, RS1, RS0 = 0, 1, 0; Power-On/Reset = 0x0710

The configuration register is a 16-bit read/write register. This register is used to configure the ADC for unipolar or bipolar mode, enable

or disable the burnout currents, and select the analog input channel. Table 15 outlines the bit designations for the configuration register.

CON0 through CON15 indicate the bit locations, with CON denoting that the bits are in the configuration register. CON15 denotes the

first bit of the data stream. The number in brackets indicates the power-on/reset default status of that bit.

MSB LSB

CON15 CON14 CON13 CON12 CON11 CON10 CON9 CON8 CON7 CON6 CON5 CON4 CON3 CON2 CON1 CON0

0(0) 0(0) BO(0)

(0)

0(0) 1(1) 1(1) 1(1) 0(0) 0(0) 0(0) 1(1) 0(0) CH2(0) CH1(0) CH0(0)

Table 15. Configuration Register Bit Designations

Bit Location Bit Name Description

CON15 to CON14 0 These bits must be programmed with a Logic 0 for correct operation.

CON13 BO

Burnout Current Enable Bit. When this bit is set to 1 by the user, the 100 nA current sources in the signal

path are enabled. When BO = 0, the burnout currents are disabled.

CON12

U/B

Unipolar/Bipolar Bit. Set by user to enable unipolar coding, that is, a zero differential input results in

0x0000(00) output, and a full-scale differential input results in 0xFFFF(FF) output. Cleared by the user to

enable bipolar coding. A negative full-scale differential input results in an output code of 0x0000(00), a

zero differential input results in an output code of 0x8000(00), and a positive full-scale differential input

results in an output code of 0xFFFF(FF).

CON11 0 This bit must be programmed with a Logic 0 for correct operation.

CON10 to CON8 1 These bits must be programmed with a Logic 1 for correct operation.

CON7 to CON5 0 These bits must be programmed with a Logic 0 for correct operation.

CON4 1 This bit must be programmed with a Logic 1 for correct operation.

CON3 0 This bit must be programmed with a Logic 0 for correct operation.

CON2 to CON0 CH2 to CH0 Channel Select bits. Written by the user to select the active analog input channel to the ADC.

CH2 CH1 CH0 Channel

0 0 0 AIN(+) − AIN(–)

0 0 1 Reserved

0 1 0 Reserved

0 1 1 AIN(–) − AIN(–)

1 0 0 Reserved

1 0 1 Reserved

1 1 0 Temp Sensor

1 1 1 AV

Monitor

DATA REGISTER

RS2, RS1, RS0 = 0, 1, 1; Power-On/Reset = 0x0000 (AD7796)/0x000000 (AD7797)

The conversion result from the ADC is stored in this data register. This is a read-only register. On completion of a read operation from

this register, the

RDY

bit/pin is set.

ID REGISTER

RS2, RS1, RS0 = 1, 0, 0; Power-On/Reset = 0x5A (AD7796)/0x5B (AD7797)

The identification number for the AD7796/AD7797 is stored in the ID register. This is a read-only register.

Data Sheet AD7796/AD7797

Rev. B | Page 15 of 24

OFFSET REGISTER

RS2, RS1, RS0 = 1, 1, 0; Power-On/Reset = 0x8000 (AD7796)/0x800000 (AD7797)

The analog input channel has an offset register that holds the offset calibration coefficient for the channel. This register is 16 bits wide on

the AD7796 and 24 bits wide on the AD7797, and its power-on/reset value is 0x8000(00). The offset register is used in conjunction with

the full-scale register to form a register pair. The power-on/reset value is automatically overwritten if an internal or system zero-scale

calibration is initiated by the user. The offset register is a read/write register. However, the AD7796/AD7797 must be in idle mode or

power-down mode when writing to this register.

FULL-SCALE REGISTER

RS2, RS1, RS0 = 1, 1, 1; Power-On/Reset = 0x5XXX (AD7796)/0x5XXX00 (AD7797)

The full-scale register is a 16-bit register on the AD7796 and a 24-bit register on the AD7797. The full-scale register holds the full-scale

calibration coefficient for the ADC. The full-scale register is a read/write register. However, when writing to the full-scale register, the

ADC must be placed in power-down mode or idle mode. The full-scale register is configured on power-on with the factory-calibrated

full-scale calibration coefficient. Therefore, every device has a different default coefficient. The default value is automatically overwritten

if a system full-scale calibration is initiated by the user, or if the full-scale register is written to.

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24

AD7796BRUZ

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Analog to Digital Converters - ADC Low Power 16-Bit

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AD7796BRUZ

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