AD7796/AD7797 Data Sheet
Rev. B | Page 22 of 24
GROUNDING AND LAYOUT
Because the analog input and reference input of the ADC are
differential, most of the voltages in the analog modulator are
common-mode voltages. The excellent common-mode reject-
ion of the device removes common-mode noise on these inputs.
The digital filter provides rejection of broadband noise on the
power supply, except at integer multiples of the modulator
sampling frequency. The digital filter also removes noise from
the analog and reference inputs provided that these noise
sources do not saturate the analog modulator. As a result, the
AD7796/AD7797 are more immune to noise interference than
conventional high resolution converters. However, because the
resolution of the AD7796/AD7797 is so high, and the noise
levels from the AD7796/AD7797 are so low, care must be taken
with regard to grounding and layout.
The printed circuit board that houses the AD7796/AD7797
should be designed such that the analog and digital sections are
separated and confined to certain areas of the board. A minimum
etch technique is generally best for ground planes because it
gives the best shielding.
It is recommended that the GND pins of the AD7796/AD7797
be tied to the AGND plane of the system. In any layout, it is
important that the user pay attention to the flow of currents in
the system, and ensure that the return paths for all currents are
as close as possible to the paths the currents took to reach their
destinations. Avoid forcing digital currents to flow through the
AGND sections of the layout.
The ground planes of the AD7796/AD7797 should be allowed
to run under the AD7796/AD7797 to prevent noise coupling.
The power supply lines to the AD7796/AD7797 should use as
wide a trace as possible to provide low impedance paths and
reduce the effects of glitches on the power supply line. Fast
switching signals such as clocks should be shielded with digital
ground to avoid radiating noise to other sections of the board,
and clock signals should never be run near the analog inputs.
Avoid crossover of digital and analog signals. Traces on
opposite sides of the board should run at right angles to each
other. This reduces the effects of feedthrough through the
board. A micro-strip technique is by far the best, but it is not
always possible with a double-sided board. In this technique,
the component side of the board is dedicated to ground planes,
while signals are placed on the solder side.
Good decoupling is important when using high resolution ADCs.
AV
DD
should be decoupled with 10 µF tantalum in parallel with
0.1 µF capacitors to GND. DV
DD
should be decoupled with 10
µF tantalum in parallel with 0.1 µF capacitors to the DGND
plane of the system, with the AGND to DGND connection of
the system being close to the AD7796/ AD7797. To achieve the
best results from these decoupling components, they should be
placed as close as possible to the device, ideally right up against
the device. All logic chips should be decoupled with 0.1 µF
ceramic capacitors to DGND.
Data Sheet AD7796/AD7797
Rev. B | Page 23 of 24
APPLICATIONS INFORMATION
The AD7796/AD7797 offer a high resolution analog-to-digital
function. Because the analog-to-digital function is provided by
a Σ-∆ architecture, the devices are more immune to noisy
environments, making them ideal for use in sensor measurement,
and industrial and process-control applications.
WEIGH SCALES
Figure 17 shows the AD7796/AD7797 being used in a weigh
scale application. The load cell is arranged in a bridge network
and gives a differential output voltage between its OUT+ and
OUTterminals. Assuming a 5 V excitation voltage, the full-
scale output range from the transducer is 10 mV when the
sensitivity is 2 mV/V. The excitation voltage for the bridge can
be used to directly provide the reference for the ADC because
the reference input range includes the supply voltage. This allows a
ratiometric measurement. Therefore, variations of the excitation
voltage do not affect the measurement.
The on-chip temperature sensor can be used for temperature
compensation of the bridge so the variation of the sensor
resistance with temperature drift can be monitored and the
conversions from the bridge can be compensated.
AD7796/AD7797
AIN(+)
AIN(–)
INTERNAL
CLOCK
AV
DD
DV
DD
REFIN(–)
REFIN(+)
DOUT/RDY
DIN
SCLK
MUX
GND
GND
CLK
Σ-Δ
AD
C
V
DD
V
DD
×128
TEMP
SE
NSO
R
SER
IAL
INT
ERF
ACE
AN
D
CONTROL
LOGIC
CS
IN
+
IN
O
UT
OUT
+
06083-017
Figure 17. Weigh Scales Using the AD7796/AD7797
AD7796/AD7797 Data Sheet
Rev. B | Page 24 of 24
OUTLINE DIMENSIONS
16
9
81
PIN 1
SEATING
PLANE
4.50
4.40
4.30
6.40
BSC
5.10
5.00
4.90
0.65
BSC
0.15
0.05
1.20
MAX
0.20
0.09
0.75
0.60
0.45
0.30
0.19
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 18. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
ORDERING GUIDE
Model
1
Temperature Range Package Description Package Option
AD7796BRUZ 40°C to +85°C 16-Lead TSSOP RU-16
AD7796BRUZ-REEL 40°C to +85°C 16-Lead TSSOP RU-16
AD7797BRUZ 40°C to +85°C 16-Lead TSSOP RU-16
AD7797BRUZ-REEL 40°C to +85°C 16-Lead TSSOP RU-16
EVAL-AD7796EB Evaluation Board
EVAL-AD7797EB Evaluation Board
1
Z = RoHS Compliant Part.
©20062016 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06083-0-3/16(B)

AD7796BRUZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC Low Power 16-Bit
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