ICS841664AGI REVISION A JULY 15, 2013 14 ©2013 Integrated Device Technology, Inc.
ICS841664I Data Sheet FEMTOCLOCK
®
CRYSTAL-TO-HCSL CLOCK GENERATOR
Power Considerations
This section provides information on power dissipation and junction temperature for the ICS841664I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the ICS841664I is the total power minus the analog power plus the power dissipated into the load. The following
is the power dissipation for V
DD
= 3.3V + 5% = 3.465V, which gives worst case results.
Core and HCSL Output Power Dissipation
• Power (core)
MAX
= V
DD_MAX
* (I
DD_MAX
+ I
DDA_MAX
) = 3.465V * (80mA + 20mA) = 346.5mW
• Power (outputs)
MAX
= 44.5mW/Loaded Output pair
If all outputs are loaded, the total power is 4 * 44.5mW = 178mW
LVCMOS Driver Power Dissipation
• Dynamic Power Dissipation at 25MHz
Power (25MHz) = C
PD
* Frequency * (V
DD
)
2
= 4pF * 25MHz * (3.465V)
2
= 1.20mW per output
Total Power Dissipation
• Total Power
= Power (core) + Power (Outputs) + Total Power (25MHz)
= 346.5mW + 178mW + 1.2mW
= 525.7mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj =
JA
* Pd_total + T
A
Tj = Junction Temperature
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
JA
must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 64.5°C/W per Table 7 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 0.526W * 64.3°C/W = 118.9°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 7. Thermal Resistance
JA
for 28 Lead TSSOP, Forced Convection
JA
by Velocity
Meters per Second 012.5
Multi-Layer PCB, JEDEC Standard Test Boards 64.5°C/W 60.4°C/W 58.5°C/W
