ICS841664AGI REVISION A JULY 15, 2013 6 ©2013 Integrated Device Technology, Inc.
ICS841664I Data Sheet FEMTOCLOCK
®
CRYSTAL-TO-HCSL CLOCK GENERATOR
Table 6B. HCSL AC Characteristics, V
DD
= V
DDOA
= V
DDOB
= 3.3V±5%, T
A
= -40°C to 85°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device is
mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal equilibrium
has been reached under these conditions.
NOTE: All measurements are taken at 125MHz and 156.25MHz.
NOTE 1: Please refer to the Phase Noise Plot.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the differential cross points.
NOTE 3: This parameter is defined in accordance with JEDEC Standard 65.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
OUT
Output Frequency
VCO/5 125 MHz
VCO/4 156.25 MHz
tjit(Ø) RMS Phase Jitter (Random); NOTE 1
125MHz, Integration Range:
1.875MHz - 20MHz
0.45 0.55 ps
156.25MHz, Integration Range:
1.875MHz - 20MHz
0.41 0.54 ps
tjit(cc) Cycle-to-Cycle Jitter; NOTE 3 60 ps
tsk(o)
Output Skew;
NOTE 2, 3
QAx, nQAx,
QBx, nQBx
140 ps
t
L
PLL Lock Time 100 ms
V
HIGH
Voltage High 650 700 950 mV
V
LOW
Voltage Low -150 150 mV
V
OVS
Max. Voltage, Overshoot 0.3 V
V
UDS
Min. Voltage, Undershoot -0.3 V
V
RB
Ringback Voltage 0.2 V
V
CROSS
Absolute Crossing Voltage 200 550 mV
V
CROSS
Total Variation of V
CROSS
over all edges
160 mV
t
R
/ t
F
Output Rise/Fall Time
QAx, nQAx,
QBx, nQBx
measured between
0.175V to 0.525V
100 700 ps
t
R
/ t
F
Rise/Fall Time Variation 125 ps
odc Output Duty Cycle
QAx, nQAx,
QBx, nQBx
47 53 %
