AT17LV65A/128A/256A/512A/002A [DATASHEET]
Atmel-2322I-FPGA-AT17LV65A-128A-256A-512A-002A-Datasheet_102014
10
Table 10-7. AC Characteristics when Cascading for V
CC
= 5.0V ± 10%
Notes: 1. AC test lead = 50pF.
2. Float delays are measured with 5pF AC loads. Transition is measured ± 200mV from steady-state active levels.
3. The AT17LV65A, AT17LV128A, and AT17LV256A are not recommended for new designs.
Figure 10-1. AC Waveforms
Figure 10-2. AC Waveforms when Cascading
Symbol Description
AT17LV65A/128A/256A
(3)
AT17LV512A/010A/002A
UnitsMin Max Min Max
T
CDF
(2)
CLK to Data Float Delay 50 50 ns
T
OCK
(1)
CLK to CEO Delay 40 40 ns
T
OCE
(1)
CE to CEO Delay 35 35 ns
T
OOE
(1)
RESET/OE to CEO Delay 35 30 ns
F
MAX
Maximum Input Clock Frequency 10 12.5 MHz
nCS
RESET/OE
DCLK
DATA
T
SCE
T
LC
T
HC
T
CAC
T
OE
T
CE
T
OH
T
HOE
T
SCE
T
HCE
T
DF
T
OH
nCS
RESET/OE
DCLK
DATA
nCASL
T
CDF
T
OCK
T
OCE
T
OCE
T
OOE
LAST BIT
FIRST BIT
11
AT17LV65A/128A/256A/512A/002A [DATASHEET]
Atmel-2322I-FPGA-AT17LV65A-128A-256A-512A-002A-Datasheet_102014
10.5 Thermal Resistance Coefficients
Table 10-8. Thermal Resistance Coefficients
Notes: 1. Airflow = 0ft/min.
2. The AT17LV65A, AT17LV128A, and AT17LV256A are not recommended for new designs.
Package Type AT17LV65A/128A/256A
(2)
AT17LV512A/010A AT17LV002A
8P3
Plastic Dual Inline
Package (PDIP)
JC
[C/W] 37
JA
[C/W]
(1)
107
20J
Plastic Leaded Chip
Carrier (PLCC)
JC
[C/W] 35 35 35
JA
[C/W]
(1)
90 90 90
AT17LV65A/128A/256A/512A/002A [DATASHEET]
Atmel-2322I-FPGA-AT17LV65A-128A-256A-512A-002A-Datasheet_102014
12
11. Ordering Information
11.1 Ordering Code Detail
11.2 Ordering Information
Notes: 1. Use 512-Kbit density parts to replace Altera EPC1441.
2. Use 1-Mbit density parts to replace Altera EPC1
3. Use 2-Mbit density parts to replace Altera EPC2.
4. The AT17LVxxxA do not support JTAG programming. They use a 2-wire serial interface for in-system
programming.
AT17LV512A-10PU
Atmel Designator
Product Family
Device Density
Special Pinouts
Product Variation
65 = 65 kilobit
128 = 128 kilobit
256 = 256 kilobit
512 = 512 kilobit
010 = 1 Mbit
002 = 2 Mbit
A = Altera
Blank = Xilinx/Atmel/Other
17LV = FPGA EEPROM
Configuration Memory
Package Device Grade
U = Green, Industrial
Temperature Range
(-40°C to +85°C)
10 = Default Value
Package Option
P = 8P3, 8-lead PDIP
J = 20J, 20-lead PLCC
Memory Size Atmel Ordering Code Lead Finish Package Voltage Operation Range
512-Kbit
(1)(4)
AT17LV512A-10JU
Sn
(Lead-free/Halogen-free)
20J
3.0V to 5.5V
Industrial
(-40C to 85C)
AT17LV512A-10PU 8P3
1-Mbit
(2)(4)
AT17LV010A-10JU
Sn
(Lead-free/Halogen-free)
20J
3.0V to 5.5V
Industrial
(-40C to 85C)
AT17LV010A-10PU 8P3
2-Mbit
(1)(4)
AT17LV002A-10JU
Sn
(Lead-free/Halogen-free)
20J 3.0V to 5.5V
Industrial
(-40C to 85C)
Package Type
8P3 8-lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
20J 20-lead, Plastic J-leaded Chip Carrier (PLCC)

AT17LV002A-10JU

Mfr. #:
Manufacturer:
Microchip Technology / Atmel
Description:
FPGA - Configuration Memory CONFIG SER EEPROM-2M ALTERA PINOUT-10MHZ
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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