Philips
Semiconductors
PCA9504A
Glue chip 4
Product data
Supersedes data of 2003 Nov 10
2004 May 11
INTEGRATED CIRCUITS
Philips Semiconductors Product data
PCA9504AGlue chip 4
2
2004 May 11
FEATURES
Dual, Strapping, Selectable Feature Sets
Audio-disable Circuit
Mute Audio Circuit
5 V reference generation
5 V standby reference generation
HD single color LED driver
IDE reset signal generation/PCIRST# buffers
PWROK (PWRGD_3V) signal generation
Power Sequencing / BACKFEED_CUT
Power Supply turn on circuitry
RMSRST# generation
Voltage translation for DDC to VGA monitor
HSYNCH / VSYNCH voltage translation to VGA monitor
3-state buffers for test
Extra GP Logic gates
Power LED Drivers
Flash FLUSH# / INIT# circuit
5 V I
2
C to 3.3 V SMBus conversion to 400 kHz
Requires both 3.3 V and 5.0 V operating voltages
0 to +70 °C operating temperature range
ESD protection exceeds 1000 V HBM per JESD22-A114 and
750 V CDM per JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 which
exceeds 100 mA
Package offered: TSSOP56
DESCRIPTION
The PCA9504A Glue Chip 4 is a highly integrated and cost-efficient
custom ASIC that reduces logic part count, overall component cost,
and board space requirements for PC designers and manufacturers.
The Glue Chip 4 supports the latest generation of high-volume
platforms based on Intel processors and chipsets that require
additional external circuitry in order to function properly. It is used on
entry servers/workstations (840 and 860 chipsets), high-end
desktops (820 and 850 chipsets), as well as mid range (815, 830
and 845 chipsets) and low-end (810 chipset) motherboards. Some
of these functionalities include meeting timing specifications,
buffering signals, and switching between power wells.
The PCA9504A Glue Chip 4 integrates miscellaneous motherboard
logic and analog functions into a single, small footprint 56-pin
TSSOP device. The Glue Chip 4 typically resides on the
motherboard close to the I/O controller Hub (ICH) and is optimized
for the Intel 82801BA I/O controller hub (ICH2).
PIN CONFIGURATION
SW00578
1
2
3
4
5
6
7
8
9
10
11
12 45
46
47
48
49
50
51
52
53
54
55
56VREF3IN
V_3P3_STBY
GPO_FLUSH_CACHE/GP1_IN
A20M/GP1_INB
INIT/GP1_INA
FLUSH_OUT_CPU/GP1_OUT
INIT_OUT/GP2_OUT
CLK_IN
SEL_33_66
GND
GP3_OUT
GP3_IN
STRAP
VCCP_VREF
VSYNC_5V
HSYNC_5V
VSYNC_3V
REF5V_STBY
HSYNC_3V
AUD_SHDN
MUTE_AUD
VREF5INPCIRST
13
14
15
16
17
18 39
40
41
42
43
44PCRIST_OUT
AUD_EN
AUD_RST
IDE_RSTDRV
3V_DDCSCL
REF5V
RSMRST
GND
TEST_EN
GRN_LED
5V_DDCSCL
19 38
YLW_LED
3V_DDCSDA
20
21
22
23
24
25 32
33
34
35
36
375V_DDCSDA
CPU_PRESENT
SLP_S3
PS_ON
HD_LED
YLW_BLNK
SCK_BJT_GATE
GRN_BLNK
PWRGD_3V
FPRST
PWRGD_PSPRIMARY_HD
26 31 FLUSH_OUT_FWHSCSI
27 30 LATCHED_BACKFED_CUTSECONDARY_HD
28 29BACKFEED_CUT GND
V_5P0_STBY
SLP_S5
ORDERING INFORMATION
PACKAGE TEMPERATURE RANGE ORDER CODE TOPSIDE MARK DRAWING NUMBER
56-Pin Plastic TSSOP 0 °C to +70 °C PCA9504ADGG PCA9504ADGG SOT364-1
Standard packing quantities and other packaging data are available at www.philipslogic.com/packaging.
Philips Semiconductors Product data
PCA9504AGlue chip 4
2004 May 11
3
PIN DESCRIPTION
PIN(S) SYMBOL FUNCTION
1 3I VREF3IN 3.3 V input
2 P V_5P0_STBY 5 V system standby power supply
3 P V_3P3_STBY 3 V system standby power supply
4 3IU GPO_FLUSH_CACHE / GP2_IN GPO from SIO / ICH2 / Buffer 2 input
5 REF A20M / GP1_INB A20M signal from ICH2 / NAND 1 input B
6 REF INIT / GP1_INA INIT signal from the ICH2 / Buffer 1 input A
7 5V OD FLUSH_OUT_CPU / GP1_OUT Open drain signal, goes to the CPU / NAND 1 output
8 5V OD INIT_OUT / GP2_OUT Delayed INIT signal into the CPU / Buffer 2 output
9 3I CLK_IN Either 33MHz or 66MHz clock, based on SEL_33_66 pin
10 3IU SEL_33_66 Strapping option for 33MHz or 66MHz CLK_IN
11, 29, 43 G GND Ground
12 3I PCRIST PCI reset signal
13 3O PCRIST_OUT Copy of PCRIST, increased drive-strength
14 3IU AUD_EN Audio enable input (GPO from ICH2 / SIO)
15 3O AUD_RST Audio reset output
16 5O IDE_RSTDRV IDE reset output, 5 V push/pull
17 3IOD 3V_DDCSCL DDCSCL input/output 3.3 V side
18 5IOD 5V_DDCSCL DDCSCL input/output 5 V side
19 3IOD 3V_DDCSDA DDCSDA input/output 3.3 V side
20 5IOD 5V_DDCSDA DDCSDA input/output 5 V side
21 3IU CPU_PRESENT CPU present signal from the processor
22 3I SLP_S3 Signal from ICH2 for transitioning to the S3 power state
23 5V OD PS_ON Power supply turn-on signal
24 5V OD HD_LED Hard drive front panel LED output
25 5IU PRIMARY_HD IDE primary drive active input
26 5IU SCSI SCSI drive active input
27 5IU SECONDARY_HD IDE secondary drive active input
28 5V OD BACKFEED_CUT Signal used for STR circuitry
30 5O LATCHED_BACKFEED_CUT Signal used for STR circuitry
31 5V OD FLUSH_OUT_FWH Open drain signal, goes to the FWH
32 5IU PWRGD_PS Power good signal from power supply
33 5IU FPRST Reset signal from the front panel
34 3O PWRGD_3V 3.3 V power good output
35 5V OD SCK_BJT_GATE Gate signal from the SCK BJT in suspend to RAM
36 3I SLP_S5 Signal from the ICH2 for transitioning to the S5 power state
37 3IU GRN_BLNK Power LED input, from SIO GPIO
38 3IU YLW_BLNK Power LED input, from SIO GPIO
39 5V OD YLW_LED Power LED output
40 5V OD GRN_LED Power LED output
41 5ID TEST_EN Test enable, 100K internal pull-down to GND
42 3O RSMRST Reset for the ICH2 resume well
44 AO REF5V Highest system supply reference voltage
45 5I VREF5IN 5V system primary supply input
46 3IU MUTE_AUD Signal from SIO to mute audio on power up/down
47 5O AUD_SHDN Signal to audio amp to signal shutdown
48 AO REF5V_STBY Highest system standby voltage
49 3I HSYNC_3V HSYNCH input from chipset video

PCA9504ADGG,118

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC GLUE CHIP 4 DUAL 56TSSOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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