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74LVT374PW,112

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
74LVT374 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 November 2011 4 of 16
NXP Semiconductors
74LVT374
3.3 V octal D-type flip-flop; 3-state
6. Functional description
6.1 Function table
[1] H = HIGH voltage level;
L = LOW voltage level;
= LOW-to-HIGH clock transition;
h = HIGH voltage level one setup time prior to the LOW-to-HIGH clock transition;
l = LOW voltage level one setup time prior to the LOW-to-HIGH clock transition;
Z = high-impedance OFF-state;
NC = no change;
X = don’t care.
7. Limiting values
[1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability.
[3] For SO20 packages: above 70 C derate linearly with 8 mW/K.
For SSOP20 and TSSOP20 packages: above 60 C derate linearly with 5.5 mW/K.
For DHVQFN20 packages: above 60 C derate linearly with 4.5 mW/K.
Table 3. Function table
[1]
Operating mode Control Input Internal register Output
OE CP Dn Qn
Load and read register L lLL
hHH
Hold L NC X NC NC
Disable outputs H L or H X NC Z
Dn Dn Z
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +4.6 V
V
I
input voltage
[1]
0.5 +7.0 V
V
O
output voltage output in OFF-state or HIGH-state
[1]
0.5 +7.0 V
I
IK
input clamping current V
I
<0V - 50 mA
I
OK
output clamping current V
O
<0V - 50 mA
I
O
output current output in LOW-state - 128 mA
output in HIGH-state - 64 mA
T
stg
storage temperature 65 +150 C
T
j
junction temperature
[2]
- 150 C
P
tot
total power dissipation T
amb
= 40 C to +85 C
[3]
- 500 mW
74LVT374 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 November 2011 5 of 16
NXP Semiconductors
74LVT374
3.3 V octal D-type flip-flop; 3-state
8. Recommended operating conditions
9. Static characteristics
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 2.7 3.6 V
V
I
input voltage 0 5.5 V
V
IH
HIGH-level input voltage 2.0 - V
V
IL
LOW-level input voltage - 0.8 V
I
OH
HIGH-level output current - 32 mA
I
OL
LOW-level output current - 32 mA
current duty cycle 50 %; f
i
1kHz - 64 mA
T
amb
ambient temperature in free air 40 +85 C
t/V input transition rise and fall rate outputs enabled - 10 ns/V
Table 6. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions T
amb
= 40 C to +85 C Unit
Min Typ
[1]
Max
V
IK
input clamping voltage V
CC
= 2.7 V; I
IK
= 18 mA 1.2 0.9 - V
V
OH
HIGH-level output voltage V
CC
= 2.7 V to 3.6 V; I
OH
= 100 AV
CC
0.2 V
CC
0.1 - V
V
CC
= 2.7 V; I
OH
= 8mA 2.4 2.5 - V
V
CC
= 3.0 V; I
OH
= 32 mA 2.0 2.2 - V
V
OL
LOW-level output voltage V
CC
= 2.7 V
I
OL
=100A-0.10.2V
I
OL
=24mA - 0.3 0.5 V
V
CC
= 3.0 V
I
OL
= 16 mA - 0.25 0.4 V
I
OL
=32mA - 0.3 0.5 V
I
OL
=64mA - 0.4 0.55 V
V
OL(pu)
power-up LOW-level
output voltage
V
CC
= 3.6 V; I
O
=1mA; V
I
=GNDorV
CC
[2]
- 0.13 0.55 V
I
I
input leakage current all input pins; V
CC
= 0V or 3.6V; V
I
=5.5V - 1 10 A
control pins; V
CC
= 3.6 V; V
I
= V
CC
or GND - 0.1 1 A
data pins; V
CC
=3.6V
[3]
V
I
=V
CC
-0.11A
V
I
=0V 5 1-A
I
OFF
power-off leakage current V
CC
= 0 V; V
I
or V
O
= 0 V to 4.5 V - 1 100 A
I
LO
output leakage current V
O
= 5.5 V and V
CC
= 3.0 V; output HIGH
[4]
-60125A
I
BHL
bus hold LOW current V
CC
= 3.0 V; V
I
= 0.8 V 75 150 - A
I
BHH
bus hold HIGH current V
CC
= 3.0 V; V
I
=2.0V
[4]
- 150 75 A
I
BHHO
bus hold HIGH
overdrive current
V
CC
= 3.6; V
I
= 0 V to 3.6 V
[4]
--500A
74LVT374 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 November 2011 6 of 16
NXP Semiconductors
74LVT374
3.3 V octal D-type flip-flop; 3-state
[1] Typical values are measured at V
CC
= 3.3 V and T
amb
= 25 C.
[2] For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
[3] Unused pins at V
CC
or GND.
[4] This is the bus hold overdrive current required to force the input to the opposite logic state.
[5] This parameter is valid for any V
CC
between 0 V and 1.2 V with a transition time of up to 10 ms. From V
CC
= 1.2 V to V
CC
=3.3 V 0.3 V
a transition time of 100 s is permitted. This parameter is valid for T
amb
=25C only.
[6] I
CC
is measured with outputs pulled to V
CC
or GND.
[7] This is the increase in supply current for each input at the specified voltage level other than V
CC
or GND.
10. Dynamic characteristics
I
BHLO
bus hold LOW
overdrive current
V
CC
= 3.6; V
I
= 0 V to 3.6 V 500 - - A
I
O(pu/pd)
power-up/power-down
output current
V
CC
1.2 V; V
O
=0.5Vto V
CC
;
V
I
=GNDorV
CC
; OE = don’t care
[5]
-1100 A
I
OZ
OFF-state output current V
CC
=3.6V; V
I
=V
IH
or V
IL
output HIGH: V
O
=3.0V - 1 5 A
output LOW: V
O
=0.5V 51-A
I
CC
supply current V
CC
=3.6V; V
I
=GNDorV
CC
; I
O
=0A
outputs HIGH - 0.13 0.19 mA
outputs LOW - 3 12 mA
outputs disabled
[6]
- 0.13 0.19 mA
I
CC
additional supply current per input pin; V
CC
= 3 V to 3.6 V; one input
at V
CC
0.6 V and other inputs at V
CC
or
GND
[7]
-0.10.2mA
C
I
input capacitance V
I
= 0 V or 3.0 V - 4 - pF
C
O
output capacitance outputs disabled; V
O
= 0 V or 3.0 V - 7 - pF
Table 6. Static characteristics
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions T
amb
= 40 C to +85 C Unit
Min Typ
[1]
Max
Table 7. Dynamic characteristics
Voltages are referenced to ground (GND = 0 V); for test circuit see Figure 9
.
Symbol Parameter Conditions T
amb
= 40 C to +85 C Unit
Min Typ
[1]
Max
t
PLH
LOW to HIGH propagation delay CP to Qn; see Table 6
V
CC
= 3.0 V to 3.6 V 1.7 3.2 5.1 ns
V
CC
= 2.7 V - - 5.8 ns
t
PHL
HIGH to LOW propagation delay CP to Qn; see Table 6
V
CC
= 3.0 V to 3.6 V 2.2 3.5 5.2 ns
V
CC
= 2.7 V - - 5.5 ns
t
PZH
OFF-state to HIGH propagation delay OE to Qn; see Figure 6
V
CC
= 3.0 V to 3.6 V 1.5 3.2 5.3 ns
V
CC
= 2.7 V - - 7.3 ns
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74LVT374PW,112

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Buy 74LVT374PW,112
Manufacturer:
NXP Semiconductors
Description:
Flip Flops 3.3V OCT D-TYPE 3-S
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New from this manufacturer.
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