74LVT374 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 November 2011 7 of 16
NXP Semiconductors
74LVT374
3.3 V octal D-type flip-flop; 3-state
[1] Typical values are at V
CC
= 3.3 V and T
amb
=25 C.
[2] t
su
is the same as t
su(H)
and t
su(L)
[3] t
h
is the same as t
h(H)
and t
h(L)
[4] t
W
is the same as t
WH
and t
WL
t
PZL
OFF-state to LOW propagation delay OE to Qn; see Figure 7
V
CC
= 3.0 V to 3.6 V 2.0 3.4 5.2 ns
V
CC
= 2.7 V - - 6.1 ns
t
PHZ
HIGH to OFF-state propagation delay OE to Qn; see Figure 6
V
CC
= 3.0 V to 3.6 V 1.9 4.3 6.7 ns
V
CC
= 2.7 V - - 7.1 ns
t
PLZ
LOW to OFF-state propagation delay OE to Qn; see Figure 7
V
CC
= 3.0 V to 3.6 V 2.0 3.4 5.1 ns
V
CC
= 2.7 V - - 5.1 ns
t
su
set-up time Dn to CP; see Figure 8
[2]
V
CC
= 3.0 V to 3.6 V 2.0 0.7 - ns
V
CC
=2.7V 2.0 - - ns
t
h
hold time Dn to CP; see Figure 8
[3]
V
CC
= 3.0 V to 3.6 V 0.3 0.5 - ns
V
CC
=2.7V 0 - - ns
t
W
pulse width CP input HIGH; see Figure 5
[4]
V
CC
= 3.0 V to 3.6 V 1.5 0.8 - ns
V
CC
=2.7V 1.5 - - ns
CP input LOW; see Figure 5
[4]
V
CC
= 3.0 V to 3.6 V 2.5 1.7 - ns
V
CC
=2.7V 3.0 - - ns
f
max
maximum frequency CP input; see Figure 5
V
CC
= 3.0 V to 3.6 V 125 200 - MHz
V
CC
=2.7V 125 - - MHz
Table 7. Dynamic characteristics
…continued
Voltages are referenced to ground (GND = 0 V); for test circuit see Figure 9.
Symbol Parameter Conditions T
amb
= 40 C to +85 C Unit
Min Typ
[1]
Max
74LVT374 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 November 2011 8 of 16
NXP Semiconductors
74LVT374
3.3 V octal D-type flip-flop; 3-state
11. Waveforms
Measurement points are given in Table 8
V
OL
and V
OH
are typical voltage output levels that occur with the output load.
Fig 5. Propagation delay clock input (CP) to output (Qn), pulse width clock (CP) and maximum clock frequency
001aac445
CP
input
Qn
output
t
PHL
t
PLH
t
WH
t
WL
1 / f
max
V
M
V
OH
V
I
GND
V
OL
V
M
Measurement points are given in Table 8
V
OL
and V
OH
are typical voltage output levels that occur
with the output load.
Measurement points are given in Table 8
V
OL
and V
OH
are typical voltage output levels that occur
with the output load.
Fig 6. Output enable time to HIGH-state and output
disable time from HIGH-state
Fig 7. Output enable time to LOW-state and output
disable time from LOW-state
Qn output
001aae468
OE input
V
M
V
I
V
OH
GND
GND
t
PZH
t
PHZ
V
Y
V
M
V
M
Measurement points are given in Table 8
Remark: The shaded areas indicate when the input is permitted to change for predictable output performance.
Fig 8. Data setup and hold times
001aac738
V
M
CP input
V
M
V
M
V
M
V
M
V
M
t
su(H)
t
h(H)
t
su(L)
t
h(L)
Dn input
V
l
GND
V
l
GND
74LVT374 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 22 November 2011 9 of 16
NXP Semiconductors
74LVT374
3.3 V octal D-type flip-flop; 3-state
Table 8. Measurement points
Input Output
V
M
V
M
V
X
V
Y
1.5 V 1.5 V V
OL
+ 0.3 V V
OH
0.3 V
Test data is given in Table 9.
Definitions test circuit:
R
L
= Load resistance.
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to output impedance Z
o
of the pulse generator.
V
EXT
= Test voltage for switching times.
Fig 9. Load circuitry for switching times
V
EXT
V
CC
V
I
V
O
001aae235
DUT
C
L
R
T
R
L
R
L
PULSE
GENERATOR
V
M
V
M
t
W
t
W
10 %
90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 %
t
f
t
r
t
r
t
f
Table 9. Test data
Input Load V
EXT
V
I
f
i
t
W
t
r
, t
f
C
L
R
L
t
PHZ
, t
PZH
t
PLZ
, t
PZL
t
PLH
, t
PHL
2.7 V 10 MHz 500 ns 2.5 ns 50 pF 500 GND 6 V open

74LVT374PW,112

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Flip Flops 3.3V OCT D-TYPE 3-S
Lifecycle:
New from this manufacturer.
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