X9119
4
FN8162.5
July 5, 2016
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The WCR may be written directly. The data registers and the WCR
can be read and written by the host system.
Serial Interface Description
SERIAL INTERFACE
The X9119 supports a bidirectional bus oriented protocol. The
protocol defines any device that sends data onto the bus as a
transmitter and the receiving device as the receiver. The device
controlling the transfer is a master and the device being
controlled is the slave. The master will always initiate data
transfers and provide the clock for both transmit and receive
operations. Therefore, the X9119 will be considered a slave
device in all applications.
CLOCK AND DATA CONVENTIONS
Data states on the SDA line can change only during SCL LOW
periods. SDA state changes during SCL HIGH are reserved for
indicating start and stop conditions (Figure 6 on page 8).
START CONDITION
All commands to the X9119 are preceded by the start condition,
which is a HIGH to LOW transition of SDA while SCL is HIGH. The
X9119 continuously monitors the SDA and SCL lines for the start
condition and will not respond to any command until this
condition is met (Figure 6
).
STOP CONDITION
All communications must be terminated by a stop condition,
which is a LOW to HIGH transition of SDA while SCL is HIGH (see
Figure 6
).
ACKNOWLEDGE
Acknowledge is a software convention used to provide a positive
handshake between the master and slave devices on the bus to
indicate the successful receipt of data. The transmitting device,
either the master or the slave, will release the SDA bus after
transmitting eight bits. The master generates a ninth clock cycle
and during this period the receiver pulls the SDA line LOW to
acknowledge that it successfully received the eight bits of data.
The X9119 will respond with an acknowledge after recognition of
a start condition and its slave address and once again after
successful receipt of the command byte. If the command is
followed by a data byte the X9119 will respond with a final
acknowledge (see Figure 4
).
ACKNOWLEDGE POLLING
The disabling of the inputs, during the internal nonvolatile write
operation, can be used to take advantage of the typical 5ms
EEPROM write cycle time. Once the stop condition is issued to
indicate the end of the nonvolatile write command the X9119
initiates the internal write cycle. ACK polling, Flow 1 (see
Figure 5 on page 5
), can be initiated immediately. This involves
issuing the start condition followed by the device slave address. If
the X9119 is still busy with the write operation, no ACK will be
returned. If the X9119 has completed the write operation, an
ACK will be returned and the master can then proceed with the
next operation.
FIGURE 3. DETAILED POTENTIOMETER BLOCK DIAGRAM SERIAL INTERFACE DESCRIPTION
SERIAL DATA PATH
FROM INTERFACE
REGISTER 0
SERIAL
BUS
INPUT
PARALLEL
BUS
INPUT
COUNTER
REGISTER
R
H
R
L
R
W
10 10
C
O
U
N
T
E
R
D
E
C
O
D
E
WIPER
(WCR)
(DR0)
CIRCUITRY
REGISTER 1
(DR1)
REGISTER 2
(DR2)
REGISTER 3
(DR3)
R
IF WCR = 000[HEX] THEN R
W
= R
L
IF WCR = 3FF[HEX] THEN R
W
= R
H
