LTC4269-2
25
42692fb
applicaTions inForMaTion
where:
R
S
= sense resistor in source of primary MOSFET
I
RIPPLE
= I
P-P
ripple current in the output inductor L1
N
S
= number of transformer secondary turns
N
P
= number of transformer primary turns
Programming Slope Compensation
The LTC4269-2 uses a current mode architecture to provide
fast response to load transients and to ease frequency
compensation requirements. Current mode switching
regulators which operate with duty cycles above 50%
and have continuous inductor current must add slope
compensation to their current sensing loop to prevent
subharmonic oscillations. (For more information on slope
compensation, see Application Note 19.) The LTC4269-2
has programmable slope compensation to allow a wide
range of inductor values, to reduce susceptibility to PCB
generated noise and to optimize loop bandwidth. The
LTC4269-2 programs slope compensation by inserting a
resistor, R
SLOPE
, in series with the I
SENSE
pin (Figure 13).
The LTC4269-2 generates a current at the I
SENSE
pin which
is linear from 0% duty cycle to the maximum duty cycle
of the OUT pin. A simple calculation of I
SENSE
• R
SLOPE
gives an added ramp to the voltage at the I
SENSE
pin for
programmable slope compensation. (See both graphs
I
SENSE
Pin Current vs Duty Cycle and I
SENSE
Maximum
Threshold vs Duty Cycle in the Typical Performance
Characteristics section.)
CURRENT SLOPE = 35µA • DC
V
(ISENSE)
= V
SOURCE
+ (I
SENSE
• R
SLOPE
)
I
SENSE
= 8µA + 35DC µA
DC = DUTY CYCLE
FOR SYNC OPERATION
I
SENSE(SYNC)
= 8µA + (k • 35DC)µA
k = f
OSC
/f
SYNC
42692 F13
I
SENSE
OUT
LTC4269-2
OC
R
S
R
SLOPE
V
SOURCE
Figure 13. Programming Slope Compensation
42692 F14
DELAY
LTC4269-2
R
DELAY
t
DELAY
SOUT
OUT
Figure 14. Programming SOUT and OUT Delay: t
DELAY
Programming Synchronous Rectifier Timing:
SOUT to OUT delay (‘t
DELAY
’)
The LTC4269-2 has an additional output SOUT which pro-
vides a ±50mA peak drive clamped to 12V. In applications
requiring synchronous rectification for high efficiency,
the LTC4269-2 SOUT provides a sync signal for second-
ary side control of the synchronous rectifier MOSFETs
(Figure 14). Timing delays through the converter can
cause non-optimum control timing for the synchronous
rectifier MOSFETs. The LTC4269-2 provides a program-
mable delay (t
DELAY
, Figure 14) between SOUT rising
edge and OUT rising edge to optimize timing control for
the synchronous rectifier MOSFETs to achieve maximum
efficiency gains. A resistor R
DELAY
connected from the
DELAY pin to GND sets the value of t
DELAY
. Typical values
for t
DELAY
range from 10ns with R
DELAY
= 10k to 160ns
with R
DELAY
= 160k (see graph in the Typical Performance
Characteristics section).
Programming Maximum Duty Cycle Clamp
For forward converter applications, a maximum switch
duty cycle clamp which adapts to transformer input volt-
age is necessary for reliable control of the MOSFETs. This
volt-second clamp provides a safeguard for transformer
reset that prevents transformer saturation. The LTC4269-2
SD_V
SEC
and SS_MAXDC pins provide a capacitor-less,
programmable volt-second clamp solution using simple
resistor ratios (Figure 15).
An increase of voltage at the SD_V
SEC
pin causes the
maximum duty cycle clamp to decrease. Deriving SD_V
SEC
from a resistor divider connected to system input voltage
