LTC6802-2
10
68022fa
TiMing DiagraM
D3D3 D2 D1 D0 D7
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D4
D3D3D4 D2 D1 D0 D7
…
D4
t
6
t
7
t
3
t
5
t
4
t
1
t
8
t
2
PREVIOUS COMMAND CURRENT COMMAND
SCKI
SDI
CSBI
SDO
68022 TD
operaTion
THEORY OF OPERATION
The LTC6802-2 is a data acquisition IC capable of mea-
suring the voltage of 12 series connected battery cells.
An input multiplexer connects the batteries to a 12-bit
delta-sigma analog to digital converter (ADC). An internal
5ppm voltage reference combined with the ADC give the
LTC6802-2 its outstanding measurement accuracy. The
inherent benefits of the delta-sigma ADC vs other types
of ADCs (e.g. successive approximation) are explained
in Advantages of Delta-Sigma ADCs in the Applications
Information section.
Communication between the LTC6802-2 and a host pro-
cessor is handled by a SPI compatible serial interface.
Multiple LTC6802-2s can be connected to a single serial
interface. This is shown in Figure 1. The LTC6802-2s are
isolated from one another using digital isolators. A unique
addressing scheme allows all LTC6802-2s to connect to the
same serial port of the host processor. Further explanation
of the LTC6802-2 can be found in the Serial Port section
of the data sheet.
The LTC6802-2 also contains circuitry to balance cell volt-
ages. Internal MOSFETs can be used to discharge cells.
These internal MOSFETs can also be used to control external
balancing circuits. Figure 1 illustrates cell balancing by
internal discharge. Figure 4 shows the S pin controlling
an external balancing circuit. It is important to note that
the LTC6802-2 makes no decisions about turning on/off
the internal MOSFETs. This is completely controlled by
the host processor. The host processor writes values to a
configuration register inside the LTC6802-2 to control the
switches. The watchdog timer on the LTC6802-2 can be
used to turn off the discharge switches if communication
with the host processor is interrupted.
O
PEN-CONNECTION DETECTION
When a cell input (C pin) is open, it affects 2-cell measure-
ments. Figure 2 shows an open connection to C3, in an
application without external filtering between the C pins and
the cells. During normal ADC conversions (that is, using
the STCVAD command), the LTC6802 will give near zero
readings for B3 and B4 when C3 is open. The zero reading
for B3 occurs because during the measurement of B3,
the ADC input resistance will pull C3 to the C2 potential.
Similarly, during the measurement of B4, the ADC input
resistance pulls C3 to the C4 potential.
Figure 3 shows an open connection at the same point in
the cell stack as Figure 2, but this time there is an external
filter network still connected to C3. Depending on the value
of the capacitor remaining on C3, a normal measurement
of B3 and B4 may not give near zero readings, since the
C3 pin is not truly open. In fact, with a large external ca-
pacitance on C3, the C3 voltage will be charged midway
Timing Diagram of the Serial Interface
