OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

LTC6802IG-2#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P34
LTC6802-2
22
68022fa
Table 12. Flag (FLG) Register Group
REGISTER RD/WR BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
FLGR0 RD C4OV C4UV C3OV C3UV C2OV C2UV C1OV C1UV
FLGR1 RD C8OV C8UV C7OV C7UV C6OV C6UV C5OV C5UV
FLGR2 RD C12OV* C12UV* C11OV* C11UV* C10OV C10UV C9OV C9UV
*Bits C11UV, C12UV, C11OV, and C12OV are always low if the CELL10 bit in register CFGR0 is high.
Table 13. Temperature (TMP) Register Group
REGISTER RD/WR BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
TMPR0 RD ETMP1[7] ETMP1[6] ETMP1[5] ETMP1[4] ETMP1[3] ETMP1[2] ETMP1[1] ETMP1[0]
TMPR1 RD ETMP2[3] ETMP2[2] ETMP2[1] ETMP2[0] ETMP1[11] ETMP1[10] ETMP1[9] ETMP1[8]
TMPR2 RD ETMP2[11] ETMP2[10] ETMP2[9] ETMP2[8] ETMP2[7] ETMP2[6] ETMP2[5] ETMP2[4]
TMPR3 RD ITMP[7] ITMP[6] ITMP[5] ITMP[4] ITMP[3] ITMP[2] ITMP[1] ITMP[0]
TMPR4 RD REV[2] REV[1] REV[0] THSD ITMP[11] ITMP[10] ITMP[9] ITMP[8]
Table 14. Packet Error Code (PEC)
REGISTER RD/WR BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
PEC RD PEC[7] PEC[6] PEC[5] PEC[4] PEC[3] PEC[2] PEC[1] PEC[0]
applicaTions inForMaTion
LTC6802-2
23
68022fa
applicaTions inForMaTion
Table 15. Memory Bit Descriptions
NAME DESCRIPTION VALUES
CDC Comparator Duty Cycle
CDC
UV/OV COMPARATOR
PERIOD
V
REF
POWERED DOWN
BETWEEN MEASUREMENTS
CELL VOLTAGE
MEASUREMENT TIME
0
(default)
N/A (Comparator Off)
Standby Mode
Yes N/A
1 N/A (Comparator Off) No 13ms
2 13ms No 13ms
3 130ms No 13ms
4 500ms No 13ms
5* 130ms Yes 21ms
6 500ms Yes 21ms
7 2000ms Yes 21ms
*when MMB pin is low, the CDC value is set to 5
CELL10 10-Cell Mode 0=12-cell mode (default); 1=10-cell mode
LVLPL Level Polling Mode 0=toggle polling (default); 1=level polling
GPIO1 GPIO1 Pin Control
Write: 0=GPIO1 pin pull down on; 1=GPIO1 pin pull down off (default)
Read: 0=GPIO1 pin at logic ‘0’; 1=GPIO1 pin at logic ‘1’
GPIO2 GPIO2 Pin Control
Write: 0=GPIO2 pin pull down on; 1=GPIO2 pin pull down off (default)
Read: 0=GPIO2 pin at logic ‘0’; 1=GPIO2 pin at logic ‘1’
WDT Watchdog Timer Read Only: 0=WDTB pin at logic ‘0’; 1=WDTB pin at logic ‘1’
DCCx Discharge Cell x x=1..12
0=turn off shorting switch for cell ‘x’ (default); 1=turn on shorting switch
VUV
Undervoltage Comparison Voltage*
Comparison voltage = VUV * 16 * 1.5mV
(default VUV=0. When MMB pin is low a factory programmed comparison voltage is used)
VOV Overvoltage Comparison Voltage*
Comparison voltage = VOV * 16 * 1.5mV
(default VOV=0. When MMB pin is low a factory programmed comparison voltage is used)
MCxI Mask Cell x Interrupts
x=1..12 0=enable interrupts for cell ‘x’ (default)
1=turn off interrupts and clear flags for cell ‘x’
CxV
Cell x Voltage*
x=1..12
12-bit ADC measurement value for cell ‘x’
cell voltage for cell ‘x’ = CxV * 1.5mV
reads as 0xFFF while A/D conversion in progress
CxUV
Cell x Undervoltage Flag
x=1..12 cell voltage compared to VUV comparison voltage
0=cell ‘x’ not flagged for under voltage condition; 1=cell ‘x’ flagged
CxOV
Cell x Overvoltage Flag
x=1..12 cell voltage compared to VOV comparison voltage
0=cell ‘x’ not flagged for over voltage condition; 1=cell ‘x’ flagged
ETMPx
External Temperature Measurement* Temperature measurement voltage = ETMPx * 1.5mV
THSD Thermal Shutdown Status
0= thermal shutdown has not occurred; 1=thermal shutdown has occurred
Status cleared to ‘0’ on read of Thermal Register Group
REV Revision Code Device revision code
ITMP Internal Temperature Measurement* Temperature measurement voltage = ITMP * 1.5mV = 8mV * T(°K)
PEC Packet Error Code CRC value for reads
*Voltage determinations use the decimal value of the registers, 0 to 4095 for 12-bit and 0 to 255 for 8-bit registers.
LTC6802-2
24
68022fa
applicaTions inForMaTion
SERIAL COMMAND
Example for LTC6802-2 (Addressable Configuration)
Examples below use a configuration of three stacked
devices: bottom (B), middle (M), and top (T)
Write Configuration Registers (Broadcast Command)
1.
Pull CSBI low
2.
Send WRCFG command byte
3. Send CFGR0 byte, then CFGR1, CFGR2, … CFGR5 (All devices on bus receive same data)
4. Pull CSBI high; data latched into all devices on rising edge of CSBI
Calculation of serial interface time for sequence above:
Number of devices in stack= N
Number of bytes in sequence = B = 1 command byte and 6 data bytes
Serial port frequency per bit = F
Time = (1/F) * B * 8 bits/byte = (1/F) * (1+6) * 8
Time for 3 cell stacks example above, with 1MHz serial port = (1/1000000) * (1+6)*8 = 56us
Read Cell Voltage Registers (Address Command)
1.
Pull CSBI low
2.
Send Address byte for bottom device
3. Send RDCV command byte
4. Read CVR00 byte of bottom device, then CVR01 (B), CVR02 (B), … CVR17 (B), and then PEC (B)
5. Pull CSBI high
6. Repeat steps 1-5 for middle device and top device
Calculation of serial interface time for sequence above:
Number of devices in stack= N
Number of bytes in sequence = B = 1 address, 1 command, 18 register, and 1 PEC byte per device = 21*N
Serial port frequency per bit = F
Time = (1/F) * B * 8 bits/byte = (1/F) * (21*N) * 8
Time for 3-cell stacks example above, with 1MHz serial port = (1/1000000) * (21*3)*8 = 504us
Start Cell Voltage A/D Conversions and Poll Status (Broadcast Command with Toggle Polling)
1.
Pull CSBI low
2. Send STCVAD command byte (all devices in stack start A/D conversions simultaneously)
3. SDO output of all devices in parallel pulled low for approximately 12ms
4. SDO output toggles at 1kHz rate, indicating conversions complete for all devices
5. Pull CSBI high to exit polling
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P34

LTC6802IG-2#PBF

Mfr. #:
Buy LTC6802IG-2#PBF
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management Battery Stack Monitor, Individually Addressable SPI
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet