LTC6802IG-2#PBF Datasheet LTC6802IG-2#PBF, LTC6802IG-2#TRPBF | P25-P27

LTC6802-2

68022fa

applicaTions inForMaTion

FAULT PROTECTION

Overview

Care should always be taken when using high energy

sources such as batteries. There are numerous ways

that systems can be (mis-)conﬁgured that might affect a

battery system during its useful lifespan. Table 16 shows

the various situations that should be considered when plan-

ning protection circuitry. The ﬁrst ﬁve scenarios are to be

anticipated during production and appropriate protection

is included within the LTC6802-2 device itself.

Table 16. LTC6802-2 Failure Mechanism Effect Analysis

SCENARIO EFFECT DESIGN MITIGATION

Cell input open circuit (random) Power-up sequence at IC inputs Clamp diodes at each pin to V

and V

–

(within IC) provide

alternate power path.

Cell input open circuit (random) Differential input voltage overstress Zener diodes across each cell voltage input pair (within IC)

limits stress.

Top cell input connection loss (V

) Power will come from highest connected cell input

or via data port fault current

Clamp diodes at each pin to V

and V

–

(within IC) provide

alternate power path.

Bottom cell input connection loss

–

)

Power will come from lowest connected cell input

or via data port fault current

Clamp diodes at each pin to V

and V

–

(within IC) provide

alternate power path.

Disconnection of a harness between

a group of battery cells and the IC

(in a system of stacked groups)

Loss of supply connection to the IC Clamp diodes at each pin to V

and V

–

(within IC) provide

an alternate power path if there are other devices (which can

supply power) connected to the LTC6802-2.

Data link disconnection between

LTC6802-2 and the master.

Loss of serial communication (no stress to ICs). The device will enter standby mode within 2 seconds of

disconnect. Discharge switches are disabled in standby mode.

Cell-pack integrity, break between

stacked units

No effect during charge or discharge Use digital isolators to isolate the LTC6802-2 serial port from

other LTC6802-2 serial ports.

Cell-pack integrity, break within

stacked unit

Cell input reverse overstress during discharge Add parallel Schottky diodes across each cell for load-path

redundancy. Diode and connections must handle full operating

current of stack, will limit stress on IC

Cell-pack integrity, break within

stacked unit

Cell input positive overstress during charge Add SCR across each cell for charge-path redundancy. SCR

and connections must handle full charging current of stack, will

limit stress on IC by selection of trigger Zener

Poll Interrupt Status (Level Polling)

1. Pull CSBI low

2. Send Address byte for bottom device

3. Send PLINT command byte

4. SDO output from bottom device pulled low if any device has an interrupt condition; otherwise, SDO high

5. Pull CSBI high to exit polling

6. Repeat steps 1-5 for middle device and top device

LTC6802-2

68022fa

applicaTions inForMaTion

Internal Protection Diodes

Each pin of the LTC6802-2 has protection diodes to help

prevent damage to the internal device structures caused

by external application of voltages beyond the supply rails

as shown in Figure 9.

The diodes shown are conventional silicon diodes with a

forward breakdown voltage of 0.5V. The unlabeled Zener

diode structures have a reverse-breakdown characteristic

which initially breaks down at 12V then snaps back to a 7V

clamping potential. The Zener diodes labeled Z

CLAMP

are

higher voltage devices with an initial reverse breakdown

of 30V snapping back to 25V. The forward voltage drop

of all Zeners is 0.5V. Refer to this diagram in the event of

unpredictable voltage clamping or current ﬂow. Limiting

the current ﬂow at any pin to ±10mA will prevent damage

to the IC.

Cell-Voltage Filtering

The LTC6802-2 employs a sampling system to perform

its analog-to-digital conversions and provides a conver-

sion result that is essentially an average over the 0.5ms

conversion window, provided there isn’t noise aliasing with

respect to the delta-sigma modulator rate of 512kHz. This

indicates that a lowpass ﬁlter with useful attenuation at

500kHz may be beneﬁcial. Since the delta-sigma integra-

tion bandwidth is about 1kHz, the ﬁlter corner need not

be lower than this to assure accurate conversions.

Series resistors of 100Ω may be inserted in the input

paths without introducing meaningful measurement

error, provided only external discharge switch FETs are

being used. Shunt capacitors may be added from the cell

inputs to V

–

, creating RC ﬁltering as shown in Figure 10.

Note that this ﬁltering is not compatible with use of the

internal discharge switches to carry current since this

would induce settling errors at the time of conversion as

any activated switches temporarily open to provide Kelvin

mode cell sensing. As a discharge switch opens, cell wiring

resistance will also form a small voltage step (recovery

of the small IR drop), so keeping the frequency cutoff of

the ﬁlter relatively high will allow adequate settling prior

to the actual conversion. A guard time of about 60µs is

provided in the ADC timing, so a 16kHz LP is optimal and

offers about 30dB of noise rejection.

68022 F09

LTC6802-2

–

WDTB

CSBI

MODE

SDO

SDI

SCKI

GPIO2

GPIO1

MMB

TOS

S10

S11

C10

S12

C11

C12

CLAMP

Figure 9. Internal Protection Diodes

Figure 10. Adding RC Filtering to the Cell Inputs

(One Cell Connection Shown)

Cn – 1

100Ω

100nF

6.2V

100nF

68021 F10

LTC6802-2

68022fa

REG

REF

TEMP2

TEMP1

−

LTC6802-2

10k 10k

10k

NTC

10k

NTC

–

LT6000

68022 F12

applicaTions inForMaTion

No resistor should be placed in series with the V

–

pin.

Because the supply current ﬂows from the V

–

pin, any

resistance on this pin could generate a signiﬁcant conver-

sion error for CELL1.

EADING

EXTERNAL TEMPERATURE PROBES

Using Dedicated Inputs

The LTC6802-2 includes two channels of ADC input, V

TEMP1

and V

TEMP2

, that are intended to monitor thermistors

(tempco about –4%/°C generally) or diodes (–2.2mV/°C

typical) located within the cell array. Sensors can be

powered directly from V

REF

as shown in Figure 11 (up to

60µA total).

For sensors that require higher drive currents, a buffer op

amp may be used as shown in Figure 12. Power for the

sensor is actually sourced indirectly from the V

REG

in this case. Probe loads up to about 1mA maximum are

supported in this conﬁguration. Since V

REF

is shutdown

during the LTC6802-2 idle and shutdown modes, the

thermistor drive is also shut off and thus power dissipa-

tion minimized. Since V

REG

remains always on, the buffer

op amp (LT6000 shown) is selected for its ultralow power

consumption (10µA).

Expanding Probe Count

The LTC6802-2 provides general purpose I/O pins, GPIO1

and GPIO2, that may be used to control multiplexing of

several temperature probes. Using just one of the GPIO

pins, the sensor count can double to four as shown in

Figure 13. Using both GPIO pins, up to eight sensor inputs

can be supported.

Figure 12. Buffering V

REF

for Higher Current Sensors

Figure 11. Driving Thermistors Directly from V

REF

100k 100k

100k

NTC

100k

NTC

1µF

REG

REF

TEMP2

TEMP1

−

LTC6802-2

68022 F11

Using Diodes to Monitor Temperatures

in Multiple Locations

Another method of multiple sensor support is possible

without the use of any GPIO pins. If the sensors are PN

diodes and several used in parallel, then the hottest diode

will produce the lowest forward voltage and effectively

establish the input signal to the V

TEMP

input(s). The hottest

diode will therefore dominate the readout from the V

TEMP

inputs that the diodes are connected to. In this scenario,

the speciﬁc location or distribution of heat is not known,

but such information may not be important in practice.

Figure 14 shows the basic concept.

In any of the sensor conﬁgurations shown, a full-scale

cold readout would be an indication of a failed-open sen-

sor connection to the LTC6802-2.

Figure 13. Expanding Sensor Count with Multiplexing

LTC6802-2

100k

NTC

100k

NTC

100k

NTC

100k

NTC

1µF

100k

SN74LVC1G3157

OR SIMILAR DEVICE

GPIO1

REG

REF

TEMP2

TEMP1

−

68022 F13

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LTC6802IG-2#PBF

Mfr. #:

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Manufacturer:

Analog Devices / Linear Technology

Description:

Battery Management Battery Stack Monitor, Individually Addressable SPI

Lifecycle:

New from this manufacturer.

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LTC6802IG-2#PBF

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