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STA020DJTR

P1-P3P4-P6P7-P9P10-P12P13-P15
This is information on a product in full production.
September 2014 DocID006832 Rev 7 1/15
STA020
96 kHz digital audio interface transmitter
Datasheet - production data
Features
Monolithic digital audio interface transmitter
3.3 V supply voltage
Supports:
– AES/EBU, IEC 958
– S/PDIF, & EIAJ CP-340
– Professional and consumer formats
Parity bits and CRC codes generated
Transparent mode allows direct connection of
STA020 and STA120
Description
The STA020 is a monolithic CMOS device which
encodes and transmits audio data according to
the AES/EBU, IEC 958, S/PDIF, & EIAJ CP-340
interface standards. It supports 96 kHz sample
rate operation.
The STA020 accepts audio and digital data which
is then multiplexed, encoded and driven onto a
cable.
The audio serial port is double-buffered and
capable of supporting a wide variety of formats.
The STA020 multiplexes the channel, user, and
validity data directly from the serial input pins with
dedicated input pins for the most important
channel status bits.
Figure 1. Block diagram
SO24
Order code: STA020DJTR
AUDIO
SERIAL PORT
REGISTERS
MUX DIFFERENTIAL
M0 M1 M2 MCK RST
SCK
FSYNC
SDATA
C
U
V
DEDICATED CHANNEL
STATUS BUS
CBL TRNPT
7
TXN
TXP
20
17
165
6
7
8
212223
10
11
9
15 24
D97AU599A
VD+
19
GND
18
www.st.com
Overview STA020
2/15 DocID006832 Rev 7
1 Overview
Table 1. Absolute maximum ratings
Table 2. Recommended operating conditions (GND = 0 V; all voltages with respect to
ground)
Figure 2. Pin connections (top view)
Symbol Parameter Value Unit
V
D+
DC power supply 4 V
V
IND
Digital input voltage -0.3 to V
D+
0.3 V
T
amb
Ambient operating temperature (power applied) -20 to +85 °C
T
stg
Storage temperature -40 to 150 °C
Symbol Parameter Test condition Min. Typ. Max. Unit
V
D+
DC voltage 3 3.3 3.6 V
T
amb
Ambient operating temp. 0 25 70 °C
Table 3. Pin description
N° Pin Function
Power supply connections
18 GND Ground.
19 VD+ Positive digital power. Nominally +3.3 V.
Audio input interface
6 SCK
Serial clock.
Serial clock for SDATA pin which can be configured (via the M0, M1
and M2 pins) as an input or output and can sample data on the rising or
falling edge. As an output, SCK will contain 32 clocks for every audio
sample.
SCK
FSYNC
SDATA
V
C/SBF
C9/C15
U
1
3
2
4
5
6
7
8
9
EM1/C8
CBL/SBC
EM0/C9
RST
TXN
GND
VD+19
18
17
16
15
13
14
D97AU608A
10
11
12
24
23
22
21
20
C7/C3
PRO
C1/FC0
C6/C2
MCK TXP
M2
M1
M0
TRNPT/FC1
DocID006832 Rev 7 3/15
STA020 Overview
15
7 FSYNC
Frame sync.
Delineates the serial data and may indicate the particular channel, left
or right, and may be an input or output. The format is based on M0, M1
and M2 pins.
8 SDATA
Serial data.
Audio data serial input pin.
21,
22,23
M0, M1, M2
Serial port mode select.
Selects the format of FSYNC and the sample edge of SCK with respect
to SDATA.
Control pins
1
C7/C3
Channel status bit 7/Channel status bit 3
In professional mode, C7 is the inverse of channel status bit 7. In
consumer mode, C3 is the inverse of channel status bit 3,
C7/C3 are
ignored in transparent mode.
2 PRO
Professional/Consumer select.
Selects between professional mode (
PRO low) and consumer mode
(
PRO high). This pin defines the functionality of the channel status
parallel pins.
PRO is ignored in transparent mode.
3
C1/FC0
Channel status bit 1/Frequency control 0.
In professional mode, C1 is the inverse of channel status bit 1. In
consumer mode, FC0 and FC1 are encoded versions of channel status
bits 24 and 25 (bits 0 and 1 of byte 3). When FC0 and FC1 are both
high, CD mode is selected. C1/FC0 are ignored in transparent mode.
4
C6/C2
Channel status bit 6/Channel status bit 2.
In professional mode, C6 is the inverse of channel status bit 6. In
consumer mode,
C2 is the inverse of channel status bit 2. C6/C2 are
ignored in transparent mode
9V
Validity.
Validity bit serial input port. This bit is defined as per the digital audio
standards wherein V = 0 signifies the audio signal is suitable for
conversion to analog. V = 1 signifies the audio signal is not suitable for
conversion to analog, i.e. invalid.
10 C/SBF
Channel status serial input/Subcode frame clock.
In professional and consumer modes this pin is the channel status
serial input port. In CD mode this pin inputs the CD subcode frame
clock.
11 U
User bit.
User bit serial input port.
12
C9/C15
Channel status bit 9/Channel status bit 15.
In professional mode, C9 is the inverse of channel status bit 9 (bit 1 of
byte 1). In consumer mode,
C15 is the inverse of channel status bit 15
(bit 7 of byte 1).
C9/C15 are ignored in transparent mode.
13 EM1/
C8
Emphasis 1/Channel status bit 8.
In professional mode, EM0 and EM1 encode channel status bits 2, 3
and 4. In consumer mode,
C8 is the inverse of channel status bit 8 (bit 0
of byte 1). EM1/
C8 are ignored in transparent mode.
Table 3. Pin description (continued)
N° Pin Function
P1-P3P4-P6P7-P9P10-P12P13-P15

STA020DJTR

Mfr. #:
Buy STA020DJTR
Manufacturer:
STMicroelectronics
Description:
Audio Transmitters, Receivers, Transceivers 96kHz Digital Audio CMOS Interface
Lifecycle:
New from this manufacturer.
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