Document Number: 38-07246 Rev. *K Page 4 of 19
Pin Description
Pin No. Name I/O Type Description
1 REF2 I LVTTL/LVCMOS Input reference frequency, 5 V tolerant input.
2 REF1 I LVTTL/LVCMOS Input reference frequency, 5 V tolerant input.
3 CLKB0 O LVTTL Clock output, Bank B.
4 CLKB1 O LVTTL Clock output, Bank B.
5V
SSB
PWR POWER Ground for Bank B.
6 CLKB2 O LVTTL Clock output, Bank B.
7 CLKB3 O LVTTL Clock output, Bank B.
8V
DDB
PWR POWER 2.5 V or 3.3 V supply, Bank B.
9V
SSB
PWR POWER Ground for Bank B.
10 CLKB4 O LVTTL Clock output, Bank B.
11 CLKB5 O LVTTL Clock output, Bank B.
12 V
DDB
PWR POWER 2.5 V or 3.3 V supply, Bank B.
13 V
DDC
PWR POWER 3.3 V core supply.
14 S2 I LVTTL Select input.
15 S1 I LVTTL Select input.
16 V
SSC
PWR POWER Ground for core.
17 V
DDA
PWR POWER 2.5 V or 3.3 V supply, Bank A.
18 CLKA5 O LVTTL Clock output, Bank A.
19 CLKA4 O LVTTL Clock output, Bank A.
20 V
SSA
PWR POWER Ground for Bank A.
21 V
DDA
PWR POWER 2.5 V or 3.3 V supply Bank A.
22 CLKA3 O LVTTL Clock output, Bank A.
23 CLKA2 O LVTTL Clock output, Bank A.
24 V
SSA
PWR POWER Ground for Bank A.
25 CLKA1 O LVTTL Clock output, Bank A.
26 CLKA0 O LVTTL CLock output, Bank A.
27 FBK I LVTTL PLL feedback input.
28 REFSEL I LVTTL Reference select input. When REFSEL = 0, REF1 is selected.
When REFSEL = 1, REF2 is selected.
