19
COMMERCIAL TEMPERATURE RANGE
IDT72V70200 3.3V TIME SLOT INTERCHANGE
DIGITAL SWITCH 512 x 5
12
t
XCD
t
ZD
CLK
(ST-BUS
®
or
WFPS mode)
CLK
(GCI mode)
CCO
5711 drw12
TX
TX
VALID DATA
VALID DATA
t
DZ
ODE
TX
VALID DATA
5711 drw13
tODEtODE
Figure 9. Serial Output and External Control
Figure 10. Output Driver Enable (ODE)
Bit 1, Channel 0Bit 0, Channel 0
Bit 7, Last Ch
(1)
Bit 2, Channel 0
Bit 1, Channel 0Bit 0, Channel 0
Bit 7, Last Ch
(1)
Bit 2, Channel 0
t
FPW
t
FPH
t
CH
t
CL
t
f
t
r
t
FPS
t
SOD
t
SIS
t
SIH
F0i
CLK
TX
RX
t
CP
Figure 8. GCI Timing
tFPW
tFPH
tCH
tCL
tftrtFPS
tSOD
tSIS tSIH
F0i
CLK
TX
RX
tCP
5711 drw10
Bit 6, Channel 0Bit 7, Channel 0
Bit 0, Last Ch
(1)
Bit 5, Channel 0
Bit 6, Channel 0Bit 7, Channel 0
Bit 0, Last Ch
(1)
Bit 5, Channel 0
Figure 7. ST-BUS
®
Timing
NOTE:
1. last channel = ch 31.
NOTE:
1. last channel = ch 31.
20
COMMERCIAL TEMPERATURE RANGE
IDT72V70200 3.3V TIME SLOT INTERCHANGE
DIGITAL SWITCH 512 x 5
12
t
ALW
ADDRESS
DATA
t
ADS
t
ADH
ALE
5711 drw14
t
RW
t
WW
t
CSRW
t
ALRD
t
CSR
t
CSW
t
DHW
t
DHR
t
AKH
t
DDR
t
DSW
t
SWD
t
ALWR
t
AKD
AD0-AD7
D8-D15
CS
RD
WR
DTA
Figure 11. Multiplexed Bus Timing (Intel Mode)
AC ELECTRICAL CHARACTERISTICS - MULTIPLEXED BUS TIMING (INTEL)
NOTE:
1. High Impedance is measured by pulling to the appropriate rail with R
L
, with timing corrected to cancel time taken to discharge C
L
.
Symbol Parameter Min. Typ. Max. Units Test Conditions
t
ALW ALE Pulse Width 20 ns
t
ADS Address Setup from ALE falling 3 ns
t
ADH Address Hold from ALE falling 3 ns
t
ALRD RD Active after ALE falling 3 ns
t
DDR Data Setup from DTA LOW on Read 5 ns CL = 150pF
t
CSRW CS Hold after RD/WR 5ns
t
RW RD Pulse Width (Fast Read) 45 ns
t
CSR CS Setup from RD 0ns
t
DHR
(1)
Data Hold after RD 10 20 ns CL = 150pF, RL = 1K
t
WW WR Pulse Width (Fast Write) 45 ns
t
ALWR WR Delay after ALE falling 3 ns
t
CSW CS Setup from WR 0ns
t
DSW Data Setup from WR (Fast Write) 20 ns
t
SWD Valid Data Delay on Write (Slow Write) 122 ns
t
DHW Data Hold after WR Inactive 5 ns
t
AKD Acknowledgment Delay:
Reading/Writing Registers 43/43 ns C
L = 150pF
Reading/Writing Memory 760/750 ns C
L = 150pF
t
AKH
(1)
Acknowledgment Hold Time 22 ns CL = 150pF, RL = 1K
21
COMMERCIAL TEMPERATURE RANGE
IDT72V70200 3.3V TIME SLOT INTERCHANGE
DIGITAL SWITCH 512 x 5
12
DS
5711 drw15
ADDRESS
tCSS
tDSH
tASW
tCSH
tDDR
tADS
tADH
AD0-AD7
D8-D15
WR
CS
DTA
DATA
ADDRESS
DATA
tRWS
tDWS
tSWD
tDHW
tAKD
AD0-AD7
D8-D15
RD
R/W
AS
tRWH
tDHR
tAKH
AC ELECTRICAL CHARACTERISTICS - MULTIPLEXED BUS TIMING (MOTOROLA)
Figure 12. Multiplexed Bus Timing (Motorola Mode)
Symbol Parameter Min. Typ. Max. Units Test Conditions
t
ASW ALE Pulse Width 20 ns
t
ADS Address Setup from AS falling 3 ns
t
ADH Address Hold from AS falling 3 ns
t
DDR Data Setup from DTA LOW on Read 5 ns CL = 150pF
t
CSH CS Hold after DS falling 0 ns
t
CSS CS Setup from DS rising 0 ns
t
DHW Data Hold after Write 5 ns
t
DWS Data Setup from DS – Write (Fast Write) 20 ns
t
SWD Valid Data Delay on Write (Slow Write) 122 ns
t
RWS R/W Setup from DS Rising 60 ns
t
RWH R/W Hold from DS Rising 5 ns
t
DHR
(1)
Data Hold after Read 10 20 ns CL = 150pF, RL = 1K
t
DSH DS Delay after AS falling 10 ns
t
AKD Acknowledgment Delay:
Reading/Writing Registers 43/43 ns C
L = 150pF
Reading/Writing Memory 760/750 ns C
L = 150pF
t
AKH
(1)
Acknowledgment Hold Time 22 ns CL = 150pF, RL = 1K
NOTE:
1. High Impedance is measured by pulling to the appropriate rail with R
L
, with timing corrected to cancel time taken to discharge C
L
.

72V70200PFG8

Mfr. #:
Manufacturer:
IDT
Description:
Digital Bus Switch ICs 3.3V 512X512 TIS SWITCH
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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