LTC2488
12
2488fb
For more information www.linear.com/LTC2488
APPLICATIONS INFORMATION
directly interface to the LTC2488 without external amplifiers.
The remaining common mode input current is eliminated by
either balancing the differential input impedances or setting
the common mode input equal to the common mode refer
-
ence (see Automatic
Differential Input Current Cancellation
Section). This unique architecture does not require on-chip
buffers, thereby enabling signals to swing beyond ground
and V
CC
. Moreover, the cancellation does not interfere with
the transparent offset and full-scale auto-calibration and the
absolute accuracy (full scale + offset + linearity + drift) is
maintained even with external RC networks.
Power-Up Sequence
The LTC2488 automatically enters an internal reset state
when the power supply voltage V
CC
drops below ap-
proximately 2V. This
feature guarantees the integrity of
the conversion result, input channel selection, and serial
clock mode.
When V
CC
rises above this threshold, the converter creates
an internal power-on-reset (POR) signal with a duration
of approximately 4ms. The POR signal clears all internal
registers. The conversion immediately following a POR
cycle is performed on the input channel IN
+
= CH0, IN
–
=
CH1. The first conversion following a POR cycle is accurate
within the specification of the device if the power supply
voltage
is restored to (2.7V to 5.5V) before the end of the
POR interval. A new input channel can be programmed
into the device during this first data input/output cycle.
Reference Voltage Range
This converter accepts a truly differential external reference
voltage. The absolute/common mode voltage range for
REF
+
and REF
–
pins covers the entire operating range of
the device (GND to V
CC
). For correct converter operation,
V
REF
must be positive (REF
+
> REF
–
).
The LTC2488 differential reference input range is 0.1V to
V
CC
. For the simplest operation, REF
+
can be shorted to
V
CC
and REF
–
can be shorted to GND. The converter output
noise is determined by the thermal noise of the front end
circuits. Since the transition noise is well below 1LSB
(0.02LSB), a decrease in reference voltage will proportion
-
ally improve the converter resolution and improve INL.
Input V
oltage Range
The LTC2488 input measurement range is –0.5 • V
REF
to 0.5
• V
REF
in both differential and single-ended configurations
as shown in Figure 28. Highest linearity is achieved with
fully differential drive and a constant common mode voltage
(Figure 28b). Other drive schemes may incur an INL error
of approximately 50ppm. This
error can be calibrated out
using
a three point calibration and a second-order curve fit.
The analog inputs are truly differential with an absolute,
common mode range for the CH0 to CH3 and COM input
pins extending from GND – 0.3V to V
CC
+ 0.3V. Outside
these limits, the ESD protection devices begin to turn
on and the errors due to input leakage current increase
rapidly. Within these limits, the LTC2488 converts the
bipolar differential input signal V
IN
= IN
+
– IN
–
(where
IN
+
and IN
–
are the selected input channels), from –FS =
–0.5 • V
REF
to +FS = 0.5 • V
REF
where V
REF
= REF
+
– REF
–
.
Outside this range, the converter indicates the overrange
or the underrange condition using distinct output codes
(see Table 1).
Signals applied to the input (CH0 to CH3, COM) may
extend 300mV below ground and above V
CC
. In order to
limit any fault current, resistors of up to 5k may be added
in series with the input. The effect of series resistance on
the converter accuracy can be evaluated from the curves
presented in the Input Current/Reference Current sections.
In addition, series resistors will introduce a temperature
dependent error due to input leakage current. A 1nA
input
leakage
current will develop a 1ppm offset error on a 5k
resistor if V
REF
= 5V. This error has a very strong tem-
perature dependency.
SERIAL INTERF
ACE PINS
The LTC2488 transmits the conversion result, reads the
input channel selection, and receives a start of conversion
command through a synchronous 3- or 4-wire interface.
During the conversion and sleep states, this interface can
be used to access the converter status. During the data
output state, it is used to read the conversion result and
program the input channel.
Serial Clock Input/Output (SCK)
The serial clock pin (SCK) is used to synchronize the data
input/output transfer. Each bit is shifted out of the SDO
