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LTC2488CDE#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30
LTC2488
25
2488fb
For more information www.linear.com/LTC2488
APPLICATIONS INFORMATION
proprietary architecture used for the LTC2488 third order
modulator resolves this problem and guarantees stability
with input signals 150% of full-scale. In many industrial
applications, it is not uncommon to have microvolt level
signals superimposed over unwanted error sources with
several volts of peak-to-peak noise. Figure 19 shows mea
-
surement results for the rejection of a 7.5V peak-to-peak
noise source (150% of full scale) applied to the LTC2488.
From this curve, it is shown that the rejection performance
is maintained even in extremely noisy environments.
Output Data Rate
When using its internal oscillator, the LTC2488 produces up
to 6.9 samples per second (sps) with a notch frequency of
55Hz. The actual output data rate depends upon the length
of the sleep and data output cycles which are controlled
by the user and can be made insignificantly short. When
operating with an external conversion clock (F
O
connected
to an external oscillator), the LTC2488 output data rate
can be increased. The duration of the conversion cycle is
41036/f
EOSC
. If f
EOSC
= 307.2kHz, the converter behaves
as if the internal oscillator is used.
An increase in f
EOSC
over the nominal 307.2kHz will translate
into a proportional increase in the
maximum output data
rate (up to a maximum of 100sps). The increase in output
rate leads to degradation in offset, full-scale error, and ef
-
fective resolution as well as a shift in frequency rejection.
A change in f
EOSC
results in a proportional change in the
internal notch position. This leads to reduced differential
mode rejection of line frequencies. The common mode
rejection of line frequencies remains unchanged, thus fully
differential input signals with a high degree of symmetry
on both the IN
+
and IN
–
pins will continue to reject line
frequency noise.
An increase in f
EOSC
also increases the effective dynamic
input and reference current. External RC networks will
continue to have zero differential input current, but the
time required for complete settling (580ns for f
EOSC
=
307.2kHz) is reduced, proportionally.
Once the external oscillator frequency is increased above
1MHz (a more than 3x increase in output rate) the ef
-
fectiveness of
internal auto calibration circuits begins
INPUT SIGNAL FREQUENCY (Hz)
250f
N
252f
N
254f
N
256f
N
258f
N
260f
N
262f
N
INPUT NORMAL MODE REJECTION (dB)
2488 F17
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
Figure 17. Input Normal Mode Rejection at f
S
= 256 • f
N
INPUT FREQUENCY (Hz)
0
NORMAL MODE REJECTION (dB)
2488 F18
0
–20
–40
–60
–80
–100
–120
V
CC
= 5V
V
REF
= 5V
V
IN(CM)
= 2.5V
T
A
= 25°C
V
IN(P-P)
= 5V
V
IN(P-P)
= 7.5V
(150% OF FULL SCALE)
12.5 25 37.5 50 62.5 75 87.5 100 112.5 125 137.5 150 162.5 175 187.5
200
Figure 18. Input Normal Mode Rejection vs Input Frequency with
Input Perturbation of 100% (50Hz/60Hz Notch)
INPUT FREQUENCY (Hz)
0
12.5 25 37.5 50 62.5 75 87.5 100 112.5 125 137.5 150 162.5 175 187.5
200
NORMAL MODE REJECTION (dB)
2488 F19
0
–20
–40
–60
–80
–100
–120
V
CC
= 5V
V
REF
= 5V
V
IN(CM)
= 2.5V
V
IN(P-P)
= 5V
T
A
= 25°C
MEASURED DATA
CALCULATED DATA
Figure 19. Measure Input Normal Mode Rejection vs Input
Frequency with Input Perturbation of 150% (60Hz Notch)
LTC2488
26
2488fb
For more information www.linear.com/LTC2488
APPLICATIONS INFORMATION
to degrade. This results in larger offset errors, full scale
errors, and decreased resolution (see Figures 20 to 27).
Easy Drive ADCs Simplify Measurement of High
Impedance Sensors
Delta-Sigma ADCs, with their high accuracy and high noise
immunity, are ideal for directly measuring many types
of sensors. Nevertheless, input sampling currents can
overwhelm high source impedances or low-bandwidth,
micropower signal conditioning circuits. The LTC2488
solves this problem by balancing the input currents, thus
simplifying or eliminating the need for signal conditioning
circuits.
A common application for a delta-sigma ADC is thermistor
measurement. Figure 29 shows two examples of thermis
-
tor digitization
benefiting from the Easy Drive technology.
The first circuit (applied to input channels CH0 and CH1)
uses balanced reference resistors in order to balance the
common mode input/reference voltage and balance the
differential input source resistance. If reference resistors
R1 and R4 are exactly equal, the input current is zero and
no errors result. If these resistors have a 1% tolerance,
the maximum error in measured resistance is 1.6Ω due
to a shift in common mode voltage; far less than the 1%
error of the reference resistors themselves. No amplifier
is required, making this an ideal solution in
micropower
applications.
Easy
Drive also enables very low power, low bandwidth
amplifiers to drive the input to the LTC2488. As shown
in Figure 29, CH2 is driven by the LT1494. The LT1494
has excellent DC specs for an amplifier with 1.5µA supply
current (the maximum offset voltage is 150µV and the
open loop gain is 100,000). Its 2kHz bandwidth makes it
unsuitable for driving conventional delta sigma ADCs. Add
-
ing a 1kΩ, 0.1µF filter solves this problem by providing a
charge reservoir that supplies the LTC2488 instantaneous
current, while the 1k resistor isolates the capacitive load
from the LT1494.
Conventional delta sigma ADCs input sampling current
lead to DC errors as a result of incomplete settling in the
external RC network.
The Easy Drive technology cancels the differential input
current. By balancing the negative input (CH3) with a 1kΩ,
0.1µF network errors due to the common mode input
current are cancelled.
LTC2488
27
2488fb
For more information www.linear.com/LTC2488
20 30100
T
A
= 85°C
T
A
= 25°C
OUTPUT DATA RATE (READINGS/SEC)
–10
OFFSET ERROR (ppm OF V
REF
)
10
30
50
0
20
40
2488 F20
V
IN(CM)
= V
REF(CM)
V
CC
= V
REF
= 5V
V
IN
= 0V
F
O
= EXT CLOCK
OUTPUT DATA RATE (READINGS/SEC)
–3500
–FS ERROR (ppm OF V
REF
)
–3000
–2000
–1500
–1000
0
2488 F22
–2500
–500
V
IN(CM)
= V
REF(CM)
V
CC
= V
REF
= 5V
F
O
= EXT CLOCK
T
A
= 85°C
T
A
= 25°C
0
10
30
20
OUTPUT DATA RATE (READINGS/SEC)
0
+FS ERROR (ppm OF V
REF
)
500
1500
2000
2500
3500
2488 F21
1000
3000
V
IN(CM)
= V
REF(CM)
V
CC
= V
REF
= 5V
F
O
= EXT CLOCK
0
10
30
20
T
A
= 85°C
T
A
= 25°C
T
A
= 25°C, 85°C
OUTPUT DATA RATE (READINGS/SEC)
10
RESOLUTION (BITS)
12
16
18
2488 F23
14
V
IN(CM)
= V
REF(CM)
V
CC
= V
REF
= 5V
V
IN
= 0V
F
O
= EXT CLOCK
RES = LOG 2 (V
REF
/NOISE
RMS
)
0
10
30
20
OUTPUT DATA RATE (READINGS/SEC)
10
RESOLUTION (BITS)
12
16
18
14
V
IN(CM)
= V
REF(CM)
V
CC
= V
REF
= 5V
F
O
= EXT CLOCK
RES = LOG 2 (V
REF
/INL
MAX
)
2488 F24
T
A
= 25°C, 85°C
0
10
30
20
APPLICATIONS INFORMATION
Figure 20. Offset Error vs Output Data
Rate and Temperature
Figure 21. +FS Error vs Output Data
Rate and Temperature
Figure 22.–FS Error vs Output Data Rate
and Temperature
Figure 23. Resolution (Noise
RMS
≤ 1LSB)
vs Output Data Rate and Temperature
Figure 24. Resolution (INL
MAX
≤ 1LSB)
vs Output Data Rate and Temperature
Figure 26. Resolution (Noise
RMS
≤ 1LSB)
vs Output Data Rate and Reference
Voltage
Figure 27. Resolution (INL
MAX
≤ 1LSB)
vs Output Data Rate and Reference
Voltage
OUTPUT DATA RATE (READINGS/SEC)
–10
OFFSET ERROR (ppm OF V
REF
)
–5
5
10
20
2488 F25
0
15
V
IN(CM)
= V
REF(CM)
V
IN
= 0V
F
O
= EXT CLOCK
T
A
= 25°C
0
10
30
20
V
CC
= 5V, V
REF
= 2.5V
V
CC
= V
REF
= 5V
OUTPUT DATA RATE (READINGS/SEC)
10
RESOLUTION (BITS)
12
16
18
2488 F26
14
V
IN(CM)
= V
REF(CM)
V
IN
= 0V
F
O
= EXT CLOCK
T
A
= 25°C
RES = LOG 2 (V
REF
/NOISE
RMS
)
0
10
30
20
V
CC
= 5V, V
REF
= 2.5V, 5V
OUTPUT DATA RATE (READINGS/SEC)
10
RESOLUTION (BITS)
12
16
18
14
V
IN(CM)
= V
REF(CM)
V
IN
= 0V
REF
–
= GND
F
O
= EXT CLOCK
T
A
= 25°C
RES = LOG 2 (V
REF
/INL
MAX
)
2488 F27
0
10
30
20
V
CC
= 5V, V
REF
= 2.5V, 5V
Figure 25. Offset Error vs Output Data
Rate and Reference Voltage
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LTC2488CDE#TRPBF

Mfr. #:
Buy LTC2488CDE#TRPBF
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 16-bit, 4-ch Delta Sigma ADC
Lifecycle:
New from this manufacturer.
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