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Integrated Silicon Solution, Inc. — www.issi.com 16
Rev. B
07/29/2015
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tWC Write Cycle Time 70 ns
tAS Address Set-up Time 0 ns
tAH Address Hold Time 30 ns
tCS CE# and WE# Set-up Time 0 ns
tCH CE# and WE# Hold Time 0 ns
tOEH OE# High Hold Time 10 ns
tDS Data Set-up Time 40 ns
tDH Data Hold Time 0 ns
tWP Write Pulse Width 35 ns
tWPH Write Pulse Width High 20 ns
tBP Byte Programming Time 40
μs
tEC Chip or Block Erase Time 100 ms
tVCS VCC Set-up Time 50
μs
t
CH
t
CS
t
WP
t
WPH
t
BP
t
DH
t
DS
t
AH
t
AS
SSERDDA555555
2AA
AA 55
A0
INPUT
DATA
VALID
DATA
DATA IN
A0 - A
MS
OE#
WE#
CE#
Pro
gram Cycle
t
WC
V
CC
t
VCS
