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ADMV1009AEZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P23
ADMV1009 Data Sheet
Rev. B | Page 16 of 23
120
0
20
60
100
40
80
13000
13050
13100
13150
13200
13250
13300
13400
13350
13450
13500
4× IF SPUR (dBc)
RF FREQUENCY (GHz)
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
15770-053
Figure 53. 4× IF Leakage vs. RF Frequency at Various Temperatures,
IF = 3.1 GHz, −10 dBm
120
0
20
60
100
40
80
13000
13050
13100
13150
13200
13250
13300
13400
13350
13450
13500
4× IF SPUR (dBc)
RF FREQUENCY (GHz)
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
15770-054
Figure 54. 4× IF Leakage vs. RF Frequency at Various Temperatures,
IF = 3.3 GHz, −10 dBm
120
0
20
60
100
40
80
13000
13050
13100
13150
13200
13250
13300
13400
13350
13450
13500
4× IF SPUR (dBc)
RF FREQUENCY (GHz)
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
15770-055
Figure 55. 4× IF Leakage vs. RF Frequency at Various Temperatures,
IF = 3.5 GHz, −10 dBm
120
0
20
60
100
40
80
13000
13050
13100
13150
13200
13250
13300
13400
13350
13450
13500
4× IF SPUR (dBc)
RF FREQUENCY (GHz)
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
15770-056
Figure 56. 4× IF Leakage vs. RF Frequency at Various Temperatures,
IF = 3.1 GHz, 0 dBm
120
0
20
60
100
40
80
13000
13050
13100
13150
13200
13250
13300
13400
13350
13450
13500
4× IF SPUR (dBc)
RF FREQUENCY (GHz)
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
15770-057
Figure 57. 4× IF Leakage vs. RF Frequency at Various Temperatures,
IF = 3.3 GHz, 0 dBm
120
0
20
60
100
40
80
13000
13050
13100
13150
13200
13250
13300
13400
13350
13450
13500
4× IF SPUR (dBc)
RF FREQUENCY (GHz)
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
15770-058
Figure 58. 4× IF Leakage vs. RF Frequency at Various Temperatures,
IF = 3.5 GHz, 0 dBm
Data Sheet ADMV1009
Rev. B | Page 17 of 23
Table 5. LO Harmonic Leakage at RFOUT
Harmonics
LO Frequency (MHz)
1
1.0 2.0 3.0 4.0
9000 −51 −14 −50 −72
9500 −48 −5 −55 −67
10000 −40 −15 −51 −63
10500 −33 −28 −67 −62
11000 −33 −44 −74 −75
11500 −30 −44 −63 −77
12000 −35 −44 −73 −76
12600 −39 −40 −63 −75
1
All values are in dBm. LO Input Power = 0 dBm.
M × N SPURIOUS PERFORMANCE
LO = 0 dBm, Upper Sideband
IF = 3100 MHz at 0 dBm and RF = 13300 MHz. All values in dBc below RF power level. N/A means not applicable.
N × LO
0 1 2 3 4
M × IF
−4
N/A 98 83 83 105
−3
N/A 99 66 75 104
−2 N/A 60 52 77 89
−1
N/A 61 27 80 97
0
N/A 53 38 68 85
1
77 0 68 70 75
2
65 43 31 86 86
3
50 67 77 64 78
4
77 58 83 96 N/A
IF = 3300 MHz at 0 dBm and RF = 13300 MHz. All values in dBc below RF power level. N/A means not applicable.
N × LO
0 1 2 3 4
M × IF
−4
N/A 92 92 78 100
−3 N/A 100 85 67 101
−2 N/A 67 58 76 95
−1
N/A 57 29 76 99
0
N/A 58 32 60 80
1
74 0 73 60 79
2
64 43 32 86 82
3
57
63
79
67
91
4
78 67 80 96 N/A
IF = 3500 MHz at 0 dBm and RF = 13300 MHz. All values in dBc below RF power level. N/A means not applicable.
N × LO
0 1 2 3 4
M × IF
−4 N/A 92 92 78 100
−3 N/A 100 85 67 101
−2
N/A 67 50 76 95
−1
N/A 50 28 72 97
0
N/A 64 27 58 74
1
71
0
73
60
79
2
59 43 32 86 82
3
57 63 79 67 91
4
78 67 80 96 N/A
ADMV1009 Data Sheet
Rev. B | Page 18 of 23
THEORY OF OPERATION
The ADMV1009 is a GaAs, MMIC, SSB, upper side band
upconverter in a RoHS compliant package optimized for upper
sideband point to point microwave radio applications operating
in the 12.7 GHz to 15.4 GHz output frequency range. The
ADMV1009 supports LO input frequencies of 9 GHz to 12.6 GHz
and IF frequencies of 2.8 GHz to 4 GHz.
The ADMV1009 uses a RF amplifier preceded by a passive,
double balanced mixer, where a driver amplifier drives the
LO (see Figure 59). The combination of design, process, and
packaging technology allows the functions of these subsystems
to be integrated into a single die, using mature packaging and
interconnection technologies to provide a high performance,
low cost design with excellent electrical, mechanical, and
thermal properties. In addition, the need for external
components is minimized, optimizing cost and size.
LO DRIVER AMPLIFIER
The LO driver amplifier takes a single LO input and amplifies it
to the desired LO signal level for the mixer to operate optimally.
The LO driver amplifier requires a single dc bias voltage (VDLO)
and a single dc gate bias (VGLO) to operate. Starting at −2 V at
the gate supply (VGLO), the LO amplifier is biased at +5 V
(VDLO). Then, the gate bias (VGLO) is varied until the desired
LO amplifier bias current (IDLO) is achieved. The desired LO
amplifier bias current is 60 mA under the LO input drive of
−4 dBm to +4 dBm. The LO drive range of −4 dBm to +4 dBm
makes it compatible with Analog Devices, Inc., wideband
synthesizer portfolio without the requirement for an external
LO driver amplifier.
MIXER
The mixer has two differential inputs, IF1 and IF2, and an
external 180° balun is required to drive the IF ports differentially.
The ADMV1009 is optimized to work with the Mini-Circuit
NCS1-422+ RF balun. The mixer must be biased at −1.1 V
(VGMIX) to operate.
RF AMPLIFIER
The RF amplifier requires a single dc bias voltage (VDRF) and a
single dc gate bias (VGRF) to operate. Starting at −2 V at the
gate supply (VGRF), the RF amplifier is biased at +5 V (VDRF).
Then, the gate bias (VGRF) is varied until the desired RF amplifier
bias current (IDRF) is achieved. The desired RF amplifier bias
current is 250 mA under small signal conditions.
The ADMV1009 has an internal band-pass filter between the
mixer and the RF driver amplifier that reduces LO leakage and
filters out the lower sideband at the RF output. The balanced
input drive allows exceptional linearity performance compared
to similar single-ended solutions.
The typical application circuit (see Figure 59) shows the necessary
external components on the bias lines to eliminate any undesired
stability problems for the RF amplifier and the LO amplifier.
The ADMV1009 upconverter comes in a compact, thermally
enhanced, 4.9 mm × 4.9 mm, 32-terminal ceramic leadless chip
carrier (LCC) package. The ADMV1009 operates over the
−40°C to +85°C temperature range.
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ADMV1009AEZ

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Manufacturer:
Analog Devices Inc.
Description:
Up-Down Converters 13/15GHz GaAs UpConverter
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