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ADE7769ARZ-RL

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
ADE7769
Rev. A | Page 3 of 20
SPECIFICATIONS
V
DD
= 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C, T
MIN
to T
MAX
= −40°C to +85°C,
unless otherwise noted.
Table 1.
Parameter Value Unit Test Conditions/Comments
ACCURACY
1, 2
Measurement Error
1
on Channel V1 0.1 % reading typ
Channel V2 with full-scale signal (±165 mV),
25°C over a dynamic range 500 to 1,
line frequency = 45 Hz to 65 Hz
Phase Error
1
Between Channels
V1 Phase Lead 37° (PF = 0.8 Capacitive) ±0.1 Degrees (°) max
V1 Phase Lag 60° (PF = 0.5 Inductive) ±0.1 Degrees (°) max
AC Power Supply Rejection
1
Output Frequency Variation (CF) 0.2 % reading typ
S0 = S1 = 1, V1 = 21.2 mV rms, V2 = 116.7 mV rms @
50 Hz, ripple on V
DD
of 200 mV rms @ 100 Hz
DC Power Supply Rejection
1
Output Frequency Variation (CF) ±0.3 % reading typ
S0 = S1 = 1, V1 = 21.2 mV rms, V2 = 116.7 mV rms,
V
DD
= 5 V ± 250 mV
ANALOG INPUTS See the Analog Inputs section
Channel V1 Maximum Signal Level ±30 mV max V1P and V1N to AGND
Channel V2 Maximum Signal Level ±165 mV max V2P and V2N to AGND
Input Impedance (DC) 320 kΩ min OSC = 450 kHz, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C
Bandwidth (–3 dB) 7 kHz nominal OSC = 450 kHz, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C
ADC Offset Error
1, 2
±18 mV max
See the
Terminology and Typical Performance
Characteristics
sections
Gain Error
1
±4 % ideal typ
External 2.5 V reference, V1 = 21.2 mV rms,
V2 = 116.7 mV rms
OSCILLATOR FREQUENCY (OSC) 450 kHz nominal RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C
Oscillator Frequency Tolerance
1
±12 % reading typ
Oscillator Frequency Stability
1
±30 ppm/°C typ
REFERENCE INPUT
REF
IN/OUT
Input Voltage Range 2.65 V max 2.45 V nominal
2.25 V min 2.45 V nominal
Input Capacitance 10 pF max
ON-CHIP REFERENCE 2.45 V nominal
Reference Error ±200 mV max
Temperature Coefficient ±20 ppm/°C typ
LOGIC INPUTS
3
SCF, S0, S1
Input High Voltage, V
INH
2.4 V min V
DD
= 5 V ± 5%
Input Low Voltage, V
INL
0.8 V max V
DD
= 5 V ± 5%
Input Current, I
IN
±1 μA max Typically 10 nA, V
IN
= 0 V to V
DD
Input Capacitance, C
IN
10 pF max
LOGIC OUTPUTS
3
F1 and F2
Output High Voltage, V
OH
4.5 V min I
SOURCE
= 10 mA, V
DD
= 5 V, I
SINK
= 10 mA, V
DD
= 5 V
Output Low Voltage, V
OL
0.5 V max
CF
Output High Voltage, V
OH
4 V min I
SOURCE
= 5 mA, V
DD
= 5 V, I
SINK
= 5 mA, V
DD
= 5 V
Output Low Voltage, V
OL
0.5 V max
Frequency Output Error
1, 2
(CF) ±10 % ideal typ
External 2.5 V reference, V1 = 21.2 mV rms,
V2 = 116.7 mV rms
ADE7769
Rev. A | Page 4 of 20
Parameter Value Unit Test Conditions/Comments
POWER SUPPLY For specified performance
V
DD
4.75 V min 5 V – 5%
5.25 V max 5 V + 5%
I
DD
5 mA max Typically 4 mA
1
See the Terminology section for an explanation of specifications.
2
See the figures in the Typical Performance Characteristics section.
3
Sample tested during initial release and after any redesign or process change that may affect this parameter.
TIMING CHARACTERISTICS
V
DD
= 5 V ± 5%, AGND = DGND = 0 V, on-chip reference, RCLKIN = 6.2 kΩ, 0.5% ± 50 ppm/°C, T
MIN
to T
MAX
= −40°C to +85°C,
unless otherwise noted. Sample tested during initial release and after any redesign or process change that may affect this parameter.
See
Figure 2.
Table 2.
Parameter Specifications Unit Test Conditions/Comments
t
1
1
120
ms
F1 and F2 pulse width (logic low).
t
2
See Table 6 sec Output pulse period. See the Transfer Function section.
t
3
1/2 t
2
sec Time between the F1 and F2 falling edges.
t
4
1, 2
90 ms CF pulse width (logic high).
t
5
See Table 7 sec CF pulse period. See the Transfer Function section.
t
6
2
μs
Minimum time between the F1 and F2 pulses.
1
The pulse widths of F1, F2, and CF are not fixed for higher output frequencies. See the Frequency Outputs section.
2
The CF pulse is always 35 μs in high frequency mode. See the Frequency Outputs section and Table 7.
F1
F2
CF
t
1
t
5
t
4
t
2
t
6
t
3
05332-002
Figure 2. Timing Diagram for Frequency Outputs
ADE7769
Rev. A | Page 5 of 20
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 3.
Parameter Value
V
DD
to AGND −0.3 V to +7 V
V
DD
to DGND –0.3 V to +7 V
Analog Input Voltage to AGND,
V1P, V1N, V2P, and V2N –6 V to +6 V
Reference Input Voltage to AGND –0.3 V to V
DD
+ 0.3 V
Digital Input Voltage to DGND –0.3 V to V
DD
+ 0.3 V
Digital Output Voltage to DGND –0.3 V to V
DD
+ 0.3 V
Operating Temperature Range –40°C to +85°C
Storage Temperature Range –65°C to +150°C
Junction Temperature 150°C
16-Lead Plastic SOIC, Power Dissipation 350 mW
θ
JA
Thermal Impedance
1
124.9°C/W
Package Temperature Soldering See J-STD-20
1
JEDEC 1S standard (2-layer) board data.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degrada-
tion or loss of functionality.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

ADE7769ARZ-RL

Mfr. #:
Buy ADE7769ARZ-RL
Manufacturer:
Analog Devices Inc.
Description:
Data Acquisition ADCs/DACs - Specialized Energy Meter IC w/ Intg Oscillator
Lifecycle:
New from this manufacturer.
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