19
2548FS–AVR–03/2013
ATmega406
8. Errata
8.1 Rev. F
• Voltage-ADC Common Mode Offset
• Voltage Reference Spike
1. Voltage-ADC Common Mode Offset
The cell conversion will have an Offset-error depending on the Common Mode (CM) level.
This means that the error of a cell is depending on the voltage of the lower cells. The CM
Offset is calibrated away in Atmel production when the cells are balanced. When the cells
get un-balanced the CM depending offset will reappear:
a. Cell 1 defines its own CM level, and will never be affected by the CM dependent
offset.
b. The CM level for Cell 2 will change if Cell 1 voltage deviates from Cell 2 voltage.
c. The CM level for Cell 3 will change if Cell 1 and/or Cell 2 voltage deviates from the
voltage at Cell 3. The worst-case error is when Cell 1 and 2 are balanced while Cell 3
voltage deviates from the voltage at Cell 1 and 2.
d. The CM level for Cell 4 will change if Cell 1, Cell 2 and/or Cell 3 deviate from the volt-
age at Cell 4. The worst-case error is when Cell 1, Cell 2 and Cell 3 are balanced
while Cell 4 voltage deviates from the voltage at Cell 1, 2 and 3.
Figure 8-1 on page 20, shows the error of Cell2, Cell3 and Cell4 with 5% and 10% unbal-
anced cells.
