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ATMEGA406-1AAU

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ATmega406
The integrated cell balancing FETs allow cell balancing algorithms to be implemented in
software.
The MCU provides the following features: 40K bytes of In-System Programmable Flash with
Read-While-Write capabilities, 512 bytes EEPROM, 2K byte SRAM, 32 general purpose working
registers, 18 general purpose I/O lines, 11 high-voltage I/O lines, a JTAG Interface for On-chip
Debugging support and programming, two flexible Timer/Counters with PWM and compare
modes, one Wake-up Timer, an SM-Bus compliant TWI module, internal and external interrupts,
a 12-bit Sigma Delta ADC for voltage and temperature measurements, a high resolution Sigma
Delta ADC for Coulomb Counting and instantaneous current measurements, a programmable
Watchdog Timer with internal Oscillator, and four software selectable power saving modes.
The AVR core combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs up to ten times faster than con-
ventional CISC microcontrollers.
The Idle mode stops the CPU while allowing the other chip function to continue functioning. The
Power-down mode allows the voltage regulator, battery protection, regulator current detection,
Watchdog Timer, and Wake-up Timer to operate, while disabling all other chip functions until the
next Interrupt or Hardware Reset. In Power-save mode, the Wake-up Timer and Coulomb Coun-
ter ADC continues to run.
The device is manufactured using Atmel’s high voltage high density non-volatile memory tech-
nology. The On-chip ISP Flash allows the program memory to be reprogrammed In-System, by
a conventional non-volatile memory programmer or by an On-chip Boot program running on the
AVR core. The Boot program can use any interface to download the application program in the
Application Flash memory. Software in the Boot Flash section will continue to run while the
Application Flash section is updated, providing true Read-While-Write operation. By combining
an 8-bit RISC CPU with In-System Self-Programmable Flash, fuel gauging ADCs, dedicated bat-
tery protection circuitry, Cell Balancing FETs, and a voltage regulator on a monolithic chip, the
Atmel ATmega406 is a powerful microcontroller that provides a highly flexible and cost effective
solution for Li-ion Smart Battery applications.
The ATmega406 AVR is supported with a full suite of program and system development tools
including: C Compilers, Macro Assemblers, Program Debugger/Simulators, and On-chip
Debugger.
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ATmega406
2.2 Pin Descriptions
2.2.1 VFET
High voltage supply pin. This pin is used as supply for the internal voltage regulator, described in
”Voltage Regulator” on page 114. In addition the voltage level on this pin is monitored by the bat-
tery protection circuit, for deep-under-voltage protection. For details, see ”Battery Protection” on
page 125.
2.2.2 VCC
Digital supply voltage. Normally connected to VREG.
2.2.3 VREG
Output from the internal Voltage Regulator. Used for external decoupling to ensure stable regu-
lator operation. For details, see ”Voltage Regulator” on page 114.
2.2.4 VREF
Internal Voltage Reference for external decoupling. For details, see ”Voltage Reference and
Temperature Sensor” on page 121.
2.2.5 VREFGND
Ground for decoupling of Internal Voltage Reference. For details, see ”Voltage Reference and
Temperature Sensor” on page 121.
2.2.6 GND
Ground
2.2.7 SGND
Signal ground pin, used as reference for Voltage-ADC conversions. For details, see ”Voltage
ADC – 10-channel General Purpose 12-bit Sigma-Delta ADC” on page 116.
2.2.8 Port A (PA7:PA0)
PA3:PA0 serves as the analog inputs to the Voltage A/D Converter.
Port A also serves as a low-voltage 8-bit bi-directional I/O port with internal pull-up resistors
(selected for each bit). As inputs, Port A pins that are externally pulled low will source current if
the pull-up resistors are activated. The Port A pins are tri-stated when a reset condition becomes
active, even if the clock is not running.
Port A also serves the functions of various special features of the ATmega406 as listed in ”Alter-
nate Functions of Port A” on page 68.
2.2.9 Port B (PB7:PB0)
Port B is a low-voltage 8-bit bi-directional I/O port with internal pull-up resistors (selected for
each bit). As inputs, Port B pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port B pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port B also serves the functions of various special features of the ATmega406 as listed in ”Alter-
nate Functions of Port B” on page 70.
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ATmega406
2.2.10 Port C (PC0)
Port C is a high voltage Open Drain output port.
2.2.11 Port D (PD1:PD0)
Port D is a low-voltage 2-bit bi-directional I/O port with internal pull-up resistors (selected for
each bit). As inputs, Port D pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port D pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port D also serves the functions of various special features of the ATmega406 as listed in ”Alter-
nate Functions of Port D” on page 72.
2.2.12 SCL
SMBUS clock, Open Drain bidirectional pin.
2.2.13 SDA
SMBUS data, Open Drain bidirectional pin.
2.2.14 OC/OD/OPC
High voltage output to drive external Charge/Discharge/Pre-charge FETs. For details, see ”FET
Control” on page 133.
2.2.15 PPI/NNI
Unfiltered positive/negative input from external current sense resistor, used by the battery pro-
tection circuit, for over-current and short-circuit detection. For details, see ”Battery Protection” on
page 125.
2.2.16 PI/NI
Filtered positive/negative input from external current sense resistor, used to by the Coulomb
Counter ADC to measure charge/discharge currents flowing in the battery pack. For details, see
”Coulomb Counter - Dedicated Fuel Gauging Sigma-delta ADC” on page 106.
2.2.17 NV/PV1/PV2/PV3/PV4
NV, PV1, PV2, PV3, and PV4 are the inputs for battery cells 1, 2, 3 and 4, used by the Voltage
ADC to measure each cell voltage. For details, see ”Voltage ADC – 10-channel General Pur-
pose 12-bit Sigma-Delta ADC” on page 116.
2.2.18 PVT
PVT defines the pull-up level for the OD output.
2.2.19 BATT
Input for detecting when a charger is connected. This pin also defines the pull-up level for OC
and OPC outputs.
2.2.20 RESET
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. The minimum pulse length is given in Table 11 on page
38. Shorter pulses are not guaranteed to generate a reset.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30

ATMEGA406-1AAU

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Buy ATMEGA406-1AAU
Manufacturer:
Microchip Technology / Atmel
Description:
8-bit Microcontrollers - MCU AVR 40K FLSH 2K SRAM 512B EE-1MHZ 1.8V
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New from this manufacturer.
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