ISL89163, ISL89164, ISL89165
13
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parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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FN7707.5
October 13, 2016
For additional products, see www.intersil.com/en/products.html
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About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing, and high-end consumer markets.
For the most updated datasheet, application notes, related documentation, and related parts, see the respective product information
page found at www.intersil.com.
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.
Reliability reports are also available from our website at www.intersil.com/support
.
Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted.
Please visit our website to make sure you have the latest revision.
DATE REVISION CHANGE
October 13, 2016 FN7707.5
Ton_delay parameter added to the AC Electrical Specifications.
The “up to 400µs” label of Figure 9 is changed to “400µs typical (Ton_delay)”.
September 30, 2015 FN7707.4
Updated the Ordering Information table on page 3.
Replaced Products section with About Intersil section.
Updated Package Outline Drawing L8.3x3I to the latest revision. Changes are as follows:
-Tiebar Note updated
From: Tiebar shown (if present) is a non-functional feature.
To: Tiebar shown (if present) is a non-functional feature and may be located on any of the 4 sides (or ends).
February 22, 2012 FN7707.3
(page 5) ENA and ENB added to the Input Range parameter
(page 6) Propagation delay testing parameters changed for option C
(page 6) Note 13 added
(page 7) Figure 3 modified to show different input thresholds for testing prop delays for option C
(page 4) The startup sequence references for the
VDD Undervoltage Lock-out parameters for Option C is now the
same as Options A and B. Options A, B, and C now have the same startup sequence.
(page 5) Note 9 is rewritten to be more precise.
(page 8) The old startup sequence for Option C has been deleted (formerly Figure 10)
(page 10) The old startup sequence description in the Functional Description Overview has been deleted.
January 9, 2012 FN7707.2
(page 1) vertical part numbers in the right margin are deleted to conform to new datasheet standards.
(page 1) Last paragraph of the product description is changed to better describe the improved turn on characteristics.
(page 1) features list is reduced in size to 8 features. Some features are reworded to improve readability.
(page 1) a reference to a non-existent application note is deleted from the Related Literature section.
(page 2) pin configuration pictures are redrawn and relabeled for readability.
(page 2) some pins description names are changed to corollate to the pin name in the pin configuration pictures.
Some descriptions are also corrected. The truth table associated with the pin descriptions is expanded to include the
logic performance of the under-voltage. (these revisions are not a change to function).
(page 4) note and figure references are added to the VDD Under-voltage lock-out parameter for options A, B, and C
(page 5) note 12 is revised to more clearly describe the turn-on characteristics of options A, B, and C.
(page 6) no load test conditions added to the rising and falling propagation matching parameters.
(page 8) figures 7 and 8 added to clearly define the startup characteristics
(page 10) the last paragraph of the Functional Description overview is replaced by 3 paragraphs to more clearly
describe the under voltage and turn-on and turn-off characteristics.
(page 11). A new section is added to the application information describing how the drivers outputs can be paralleled.
(pages 1..13) various minor corrections to text for grammar and spelling.
August 26, 2011 FN7707.1
(page 5) Note 12 revised from 200µs to 400µs
(page 4) The Operating Junction Temp Range in the “Thermal Information” was revised to read
“Maximum Operating Junction Temp Range....-40°C to +150°C” from “-40°C to +125°C”
Updated POD M8.15D by converting to new POD format. Removed table of dimensions and moved dimensions onto
drawing. Added land pattern.
October 12, 2010 FN7707.0 Initial Release
ISL89163, ISL89164, ISL89165
14
FN7707.5
October 13, 2016
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Package Outline Drawing
L8.3x3I
8 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE
Rev 2 5/15
located within the zone indicated. The pin #1 identifier may be
Unless otherwise specified, tolerance : Decimal ± 0.05
The configuration of the pin #1 identifier is optional, but must be
between 0.15mm and 0.30mm from the terminal tip.
Dimension applies to the metallized terminal and is measured
Dimensions in ( ) for Reference Only.
Dimensioning and tolerancing conform to AMSE Y14.5m-1994.
6.
either a mold or mark feature.
3.
5.
4.
2.
Dimensions are in millimeters.1.
NOTES:
BOTTOM VIEW
DETAIL "X"
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
SIDE VIEW
C
0 . 2 REF
0 . 05 MAX.
0 . 00 MIN.
5
3.00
A
B
3.00
(4X) 0.15
6
PIN 1
INDEX AREA
PIN #1 INDEX AREA
6X 0.65
1.64 +0.10/ - 0.15
8
1
8X 0.400 ± 0.10
6
Max 0.80
SEE DETAIL "X"
0.08
0.10
C
C
C
( 2.80 )
(1.64)
( 8 X 0.30)
( 8X 0.60)
( 2.38 )
( 1.95)
2.38
0.10
8X 0.30
AMC B
4
2X 1.950
+0.10/ - 0.15
(6x 0.65)
4
5
PIN 1
Tiebar shown (if present) is a non-functional feature and may be
located on any of the 4 sides (or ends).
For the most recent package outline drawing, see L8.3x3I.
ISL89163, ISL89164, ISL89165
15
FN7707.5
October 13, 2016
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Package Outline Drawing
M8.15D
8 LEAD NARROW BODY SMALL OUTLINE EXPOSED PAD PLASTIC PACKAGE
Rev 1, 3/11
DETAIL "A"
TOP VIEW
INDEX
AREA
123
-C-
SEATING PLANE
x 45°
NOTES:
1. Dimensions are in millimeters. Dimensions in ( ) for reference only.
2. Dimensioning and tolerancing per ASME-Y14.5M-1994.
3. Unless otherwise specified, tolerance: Decimal ± 0.05.
4. Dimension does not include interlead flash or protrusions. Interlead flash
or protrusions shall not exceed 0.25mm per side.
5. The Pin 1 identifier may be either a mold or a mark feature.
6. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
SIDE VIEW “A
SIDE VIEW “B”
1.27 (0.050)
6.20 (0.244)
5.84 (0.230)
3.99 (0.157)
3.81 (0.150)
0.50 (0.02)
0.25 (0.01)
4.98 (0.196)
4.80 (0.189)
1.72 (0.067)
1.52 (0.059)
0.25 (0.010)
0.10 (0.004)
0.46 (0.019)
0.36 (0.014)
0.25 (0.010)
0.19 (0.008)
1.27 (0.050)
0.41 (0.016)
TYPICAL RECOMMENDED LAND PATTERN
BOTTOM VIEW
8
3.50 (0.137)
3.00 (0.118)
2.50 (0.099)
2.00 (0.078)
123
8
1.27 (0.050)
5.45 (0.214)
5
0.60 (0.023)
2.25
(0.089)
3.25 (0.128)
1.95
(0.077)
7
6
81
2
3
4
For the most recent package outline drawing, see M8.15D.

ISL89165FRTAZ-T

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Gate Drivers 6A PEAK HI SPD PWR MSFT DRVR 8LD 3X3
Lifecycle:
New from this manufacturer.
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